參數(shù)資料
型號: ICS1893AFILF
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 132/136頁
文件大?。?/td> 0K
描述: PHYCEIVER LOW PWR 3.3V 48-SSOP
標準包裝: 30
系列: PHYceiver™
類型: PHY 收發(fā)器
規(guī)程: MII
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 48-SSOP
包裝: 管件
其它名稱: 1893AFILF
Chapter 8
Management Register Set
ICS1893AF, Rev. D 10/26/04
October, 2004
95
ICS1893AF Data Sheet - Release
Copyright 2004, Integrated Circuit Systems, Inc.
All rights reserved.
8.13.8
Link Loss Inhibit (bit 18.1)
The Link Loss Inhibit bit allows an STA to prevent the ICS1893AF from dropping the link in 10Base-T mode.
When an STA sets this bit to logic:
Zero, the state machine behaves normally and the link status is based on the signaling detected Twisted-
Pair Receiver inputs.
One, the ICS1893AF 10Base-T Link Integrity Test state machine is forced into the ‘Link Passed’ state
regardless of the Twisted-Pair Receiver input conditions.
8.13.9
Squelch Inhibit (bit 18.0)
The Squelch Inhibit bit allows an STA to control the ICS1893AF Squelch Detection in 10Base-T mode.
When an STA sets this bit to logic:
Zero, before the ICS1893AF can establish a valid link, the ICS1893AF must receive valid 10Base-T
data.
One, before the ICS1893AF can establish a valid link, the ICS1893AF must receive both valid 10Base-T
data followed by an IDL.
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ICS1893AFLFT 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器,接收器,收發(fā)器 系列:PHYceiver™ 標準包裝:250 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR)
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