參數(shù)資料
型號(hào)： ICSSSTUB32866Bz(LF)T
英文描述： 25-Bit Configurable Registered Buffer for DDR2
中文描述： 25位可配置的注冊(cè)緩沖DDR2內(nèi)存
文件頁(yè)數(shù)： 21/28頁(yè)
文件大小： 554K
代理商： ICSSSTUB32866BZ(LF)T
21
ICSSSTUB32866B
Advance Information
1165—10/25/06
Output Buffer Characteristics
Output edge rates over recommended operating free-air temperature range (See figure 7)
V
DD
= 1.8V ± 0.1V
MIN
1
1
MAX
4
4
1
dV/dt_r
dV/dt_f
dV/dt_
Δ
1
V/ns
V/ns
V/ns
1. Difference between dV/dt_r (rising edge rate) and dV/dt_f (falling edge rate)
PARAMETER
UNIT
Electrical Characteristics - DC
T
A
= 0 - 70°C; V
DD
= 1.8 +/-0.1V (unless otherwise stated)
SYMBOL
PARAMETERS
V
IK
V
OH
V
OL
I
I
All Inputs
(2)
Standby (Static)
I
DD
V
DD
MIN
TYP
MAX
-1.2
UNITS
I
I
= -18mA
I
OH
= -6mA
I
OL
= 6mA
V
I
= V
DD
or GND
RESET# = GND
V
I
= V
IH(AC)
or V
IL(AC)
,
RESET# = V
DD
RESET# = V
DD
,
V
I
= V
IH(AC)
or V
IL(AC)
,
CLK and CLK# switching
50% duty cycle.
RESET# = V
DD
,
V
I
= V
IH(AC)
or V
IL (AC)
,
CLK and CLK# switching
50% duty cycle. One data
input switching at half
clock frequency, 50%
duty cycle
V
I
= V
REF
±350mV
V
ICR
= 1.25V, V
I(PP)
= 360mV
V
I
= V
DD
or GND
1.7V
1.7V
1.9V
1.2
0.5
5
100
-5
μA
μA
Operating (Static)
(3)
40
mA
Dynamic operating
(clock only)
39
μA/clock
MHz
Dynamic Operating
(per each data input)
1:1 mode
19
Dynamic Operating
(per each data input)
1:2 mode
Data Inputs
CLK and CLK#
RESET#
35
2.5
2
3.5
3
2.5
1.8V
CONDITIONS
V
μA/ clock
MHz/data
C
i
I
O
= 0
1.9V
I
DDD
pF
Notes:
1 - Guaranteed by design, not 100% tested in production.
2 - PAR_IN leakage current is ±17
μ
A due to weak pull-down resistor. Allows this device to be used as replacement
for SSTUB32864B (has no parity).
3 - Static operating current will be greater than 40mA if both CLK and CLK# are pulled HIGH or LOW.
相關(guān)PDF資料
PDF描述
ICSSSTUB32871A 27-Bit Registered Buffer for DDR2
ICSSSTUB32871AzLFT 27-Bit Registered Buffer for DDR2
ICSSSTUB32871AzT 27-Bit Registered Buffer for DDR2
ICSSSTUB32872A 28-Bit Registered Buffer for DDR2
ICSSSTUBF32866A 25-Bit Configurable Registered Buffer for DDR2
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ICSSSTUB32871A 制造商:ICS 制造商全稱:ICS 功能描述:27-Bit Registered Buffer for DDR2
ICSSSTUB32871AZLFT 制造商:ICS 制造商全稱:ICS 功能描述:27-Bit Registered Buffer for DDR2
ICSSSTUB32871AZT 制造商:ICS 制造商全稱:ICS 功能描述:27-Bit Registered Buffer for DDR2
ICSSSTUB32872A 制造商:ICS 制造商全稱:ICS 功能描述:28-Bit Registered Buffer for DDR2
ICSSSTUBF32866A 制造商:ICS 制造商全稱:ICS 功能描述:25-Bit Configurable Registered Buffer for DDR2
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*