參數(shù)資料
型號(hào): IDT7140
廠商: Integrated Device Technology, Inc.
英文描述: High Speed 1K X 8 Dual-Port Static RAM(高速1K×8雙端口靜態(tài)RAM)
中文描述: 高速每1000 × 8雙端口靜態(tài)存儲(chǔ)器(高速每1000 × 8雙端口靜態(tài)RAM)的
文件頁(yè)數(shù): 13/18頁(yè)
文件大?。?/td> 214K
代理商: IDT7140
IDT7130SA/LA AND IDT7140SA/LA
HIGH SPEED 1K X 8 DUAL-PORT STATIC SRAM
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
6.01
13
t
WC
t
WP
t
DW
t
DH
t
BDD
t
DDD
t
BDA
t
WDD
ADDR
’B’
DATA
OUT’B’
DATA
IN’A’
ADDR
’A’
MATCH
VALID
MATCH
VALID
R/W
’A’
BUSY
’B’
t
APS
(1)
2689 drw 12
TIMING WAVEFORM OF WRITE WITH PORT-TO-PORT READ AND
BUSY
(2,3,4)
NOTES:
1. To ensure that the earlier of the two ports wins.
t
BDD
is ignored for slave (IDT7140).
2.
CE
L
=
CE
R
= V
IL
3.
OE
= V
IL
for the reading port.
4. All timing is the same for the left and right ports. Port 'A' may be either the left or right port. Port "B" is opposite from port "A".
TIMING WAVEFORM OF WRITE WITH
BUSY
(3)
NOTES:
1. t
WH
must be met for both BUSY Input (IDT7140, slave) or Output (IDT7130 master).
2. BUSY is asserted on port "B" blocking R/W
"B"
, until BUSY
"B"
goes HIGH.
3. All timing is the same for the left and right ports. Port "A" may be either the left or right port. Port "B" is oppsite from port "A".
BUSY
2689 drw 13
R/W
t
WP
t
WH
t
WB
R/W
(2)
(1)
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