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參數(shù)資料
| 型號： | IDT723616L20PF8 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 21/26頁 |
| 文件大小： | 0K |
| 描述： | IC FIFO TRPL BUS 64X36X2 128QFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | 7200 |
| 功能： | 同步 |
| 存儲容量： | 4.6K（64 x 36 x2） |
| 數(shù)據(jù)速率： | 50MHz |
| 訪問時間： | 20ns |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-LQFP |
| 供應(yīng)商設(shè)備封裝： | 128-TQFP（14x20） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 723616L20PF8 |
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4
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
IDT723616 CMOS TRIPLE BUS SyncFIFO
WITH
BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2
PIN DESCRIPTION
Symbol
Name
I/O
Description
A0-A35
Port A Data
I/O
36-bit bidirectional data port for side A.
AEA
Port A Almost-Empty
O
Programmable Almost-Empty flag synchronized to CLKA. It is LOW when the number of 36-bit
Flag
words in FIFO2 is less than or equal to the value in the offset register, X.
AEB
Port B Almost-Empty
O
Programmable Almost-Empty flag synchronized to CLKB. It is LOW when the number of 36-bit
Flag
words in FIFO1 is less than or equal to the value in the offset register, X.
AFA
Port A Almost-Full
O
Programmable Almost-Full flag synchronized to CLKA. It is LOW when the number of 36-bit empty
Flag
locations in FIFO1 is less than or equal to the value in the offset register, X.
AFC
Port C Almost-Full
O
Programmable Almost-Full flag synchronized to CLKC. It is LOW when the number of
Flag
36-bit empty locations in FIFO2 is less than or equal to the value in the offset register, X.
B0-B17
Port B Data.
O
18-bit output data port for side B.
C0-C17
Port-C Data
I
18-bit input data port for side C.
CLKA
Port A Clock
I
CLKA is a continuous clock that synchronizes all data transfers through port A and can be
asynchronous or coincident to CLKB and CLKC.
EFA, FFA, AFA, and AEA are synchronized
to the LOW-to-HIGH transition of CLKA.
CLKB
Port B Clock
I
CLKB is a continuous clock that synchronizes all data read from port B and can be asynchronous
or coincident to CLKA and CLKC. Port B byte swapping and data port sizing operations are also
synchronous to the LOW-to-HIGH transition of CLKB.
EFB and AEB are synchronized to the
LOW-to-HIGH transition of CLKB.
CLKC
Port-C Clock
I
CLKC is a continuous clock that synchronizes all data written to port C and can be asynchronous
or coincident to CLKA and CLKC.
FFC and AFC are synchronized to the LOW-to-HIGH transition
of CLKC.
CSA
Port A Chip Select
I
CSA must be LOW to enable a LOW-to-HIGH transition of CLKA to read or write data on port A.
The A0-A35 outputs are in the high-impedance state when
CSA is HIGH.
EFA
Port A Empty Flag
O
EFA is synchronized to the LOW-to-HIGH transition of CLKA. When EFA is LOW, FIFO2 is empty,
and reads from its memory are disabled. Data can be read from FIFO2 to the output register
when
EFA is HIGH. EFA is forced LOW when the device is reset and is set HIGH by the second
LOW-to-HIGH transition of CLKA after data is loaded into empty FIFO2 memory.
EFB
Port B Empty Flag
O
EFB is synchronized to the LOW-to-HIGH transition of CLKB. When EFB is LOW, the FIFO1 is
empty, and reads from its memory are disabled. Data can be read from FIFO1 to the output
register when
EFB is HIGH. EFB is forced LOW when the device is reset and is set HIGH by the
second LOW-to-HIGH transition of CLKB after data is loaded into empty FIFO1 memory.
ENA
Port A Enable
I
ENA must be HIGH to enable a LOW-to-HIGH transition of CLKA to read or write data on port A.
FFA
Port A Full Flag
O
FFA is synchronized to the LOW-to-HIGH transition of CLKA. When FFA is LOW, FIFO1 is full,
and writes to its memory are disabled.
FFA is forced LOW when the device is reset and is set
HIGH by the second LOW-to-HIGH transition of CLKA after reset.
FFC
Port C Full Flag
O
FFC is synchronized to the LOW-to-HIGH transition of CLKC. When FFC is LOW, FIFO2 is full,
and writes to its memory are disabled.
FFC is forced LOW when the device is reset and is set
HIGH by the second LOW-to-HIGH transition of CLKC after reset.
FS1, FS0
Flag-OffsetSelects
I
The LOW-to-HIGH transition of
RST latches the values of FS0 and FS1, which selects one of four
preset values for the Almost-Full flag and Almost-Empty flag offset.
ODD/
Odd/Even Parity
I
Odd parity is checked on each port when ODD/
EVEN is HIGH, and even parity is checked when
EVEN
Select
ODD/
EVEN is LOW. ODD/EVEN also selects the type of parity generated for each port if parity
generation is enabled for a read operation.
PEFA
Port A Parity Error
O
When any byte applied to terminals A0-A35 fails parity,
PEFA is LOW. Bytes are organized as
Flag
A0-A8, A9-A17, A18-A26, and A27-A35, with the most significant bit of each byte serving as
the parity bit. The type of parity checked is determined by the state of the ODD/
EVEN input.
The parity trees used to check the A0-A35 inputs are shared by the mail2 register to generate
parity if parity generation is selected by PGA. Therefore, if a mail2
read parity generation is
setup by having W/
RA LOW, and PGA HIGH, the PEFA flag is forced HIGH regardless of the
A0-A35 inputs.
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| IDT723616L20PFI | 功能描述:IC FIFO TRPL BUS 64X36X2 128QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
| IDT723616L20PFI8 | 功能描述:IC FIFO TRPL BUS 64X36X2 128QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
| IDT723622L12PF | 功能描述:IC FIFO SYNC 256X36X2 120QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
| IDT723622L12PF8 | 功能描述:IC FIFO SYNC 256X36X2 120QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
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