參數(shù)資料
型號: IDT723624L15PF8
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 35/35頁
文件大小: 0K
描述: IC FIFO SYNC 256X36X2 128QFP
標(biāo)準(zhǔn)包裝: 1,000
系列: 7200
功能: 同步
存儲容量: 18.4K(256 x 36 x 2)
數(shù)據(jù)速率: 67MHz
訪問時(shí)間: 15ns
電源電壓: 4.5 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應(yīng)商設(shè)備封裝: 128-TQFP(14x20)
包裝: 帶卷 (TR)
其它名稱: 723624L15PF8
9
COMMERCIALTEMPERATURERANGE
IDT723624/723634/723644 CMOS SyncBiFIFO WITH BUS-MATCHING
256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY
VOLTAGE AND OPERATING FREE-AIR TEMPERATURE, CL = 30PF
Symbol
Parameter
Min
Max.
Min.
Max .
Unit
tA
Access Time, CLKA
↑ toA0-A35andCLKB↑toB0-B35
2
8
2
10
ns
tWFF
Propagation Delay Time, CLKA
↑ to FFA/IRA and CLKB↑ to FFB/IRB
2
8
2
8
ns
tREF
Propagation Delay Time, CLKA
↑ to EFA/ORA and CLKB↑ to EFB/ORB
1
8
1
8
ns
tPAE
Propagation Delay Time, CLKA
↑ to AEA and CLKB↑ to AEB
181
8
ns
tPAF
Propagation Delay Time, CLKA to
AFAandCLKB
↑toAFB
181
8
ns
tPMF
Propagation Delay Time, CLKA
↑ to MBF1 LOW or MBF2 HIGH and CLKB↑ to MBF2
080
8
ns
LOW or
MBF1 HIGH
tPMR
Propagation Delay Time, CLKA
↑ to B0-B35(2)and CLKB↑ to A0-A35(3)
282
10
ns
tMDV
Propagation Delay Time, MBA to A0-A35 valid and MBB to B0-B35 valid
2
8
2
10
ns
tRSF
Propagation Delay Time,
MRS1 or PRS1 LOW to AEB LOW, AFA HIGH, and MBF1
110
1
15
ns
HIGH and
MRS2 or PRS2 LOW to AEA LOW, AFB HIGH, and MBF2 HIGH
tEN
Enable Time,
CSA or W/RA LOW to A0-A35 Active and CSB LOW and W/RB HIGH to
2
6
2
10
ns
B0-B35 Active
tDIS
Disable Time,
CSA or W/RA HIGH to A0-A35 at high impedance and CSB HIGH or W/RB
1
6
1
8
ns
LOW to B0-B35 at HIGH impedance
NOTES:
1. Industrial temperature range is available by special order.
2. Writing data to the mail1 register when the B0-B35 outputs are active and MBB is HIGH.
3. Writing data to the mail2 register when the A0-A35 outputs are active and MBA is HIGH.
(Commercial: VCC = 5V ± 10%, TA = 0
°C to +70°C)
Commercial
IDT723624L12 IDT723624L15
IDT723634L12 IDT723634L15
IDT723644L12 IDT723644L15
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