參數(shù)資料
型號(hào)： IDT77155
廠商： Integrated Device Technology, Inc.
英文描述： PHY (TC-PMD) USER NETWORK INTERFACE FOR 155 MBPS ATM NETWORK APPLICATIONS
中文描述： 物理層（增距鏡TC - PMD）的用戶網(wǎng)絡(luò)接口的155Mbps的ATM網(wǎng)絡(luò)中的應(yīng)用
文件頁(yè)數(shù)： 23/50頁(yè)
文件大小： 307K
代理商： IDT77155
IIDT77155
155Mbps ATM PHY (TC-PMD) USER NETWORK INTERFACE
ADVANCED INFORMATION
Commercial Temperature Range
8.03
23
ADDRESS 0X13
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R
R
R
R
R
R
R
R
Symbol
B1ErrCnt[15]
B1ErrCnt[14]
B1ErrCnt[13]
B1ErrCnt[12]
B1ErrCnt[11]
B1ErrCnt[10]
B1ErrCnt[9]
B1ErrCnt[8]
Function
B1 error counter bit
B1 error counter bit
B1 error counter bit
B1 error counter bit
B1 error counter bit
B1 error counter bit
B1 error counter bit
B1 error counter bit
NOTE:
1. B1ErrCnt[15:0] Receive section overhead BIP (B1) error counter. Cumulative error counter keeping track of errors from the previous poll of these registers.
The error count is polled by writing to either register or to address ‘h00. Such a write transfers accumulated errors to a holding register which may be read
later, and the registers are cleared. This transfer and reset of the registers are done such that coincident events are not lost. All error registers in the receive
sections of the transmission convergence block or the cell delineation block may be polled by a write to the master register ‘h00.
TRANSMIT SECTION OVERHEAD CONTROL REGISTER
ADDRESS 0X14
DEFAULT = 8’B00000000
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
—
R/W
—
—
—
—
—
R/W
Symbol
—
scrDis
—
—
—
—
—
LAISIns
Function
Reserved
Disable transmit frame scrambler. Scrambling enabled if logic zero.
Reserved
Reserved
Reserved
Reserved
Reserved
Insert line alarm signal (LAIS) in transmit stream. Line alarm results in all bits
except the section overhead bytes being set to logic 1 prior to scrambling.
TRANSMIT SECTION OVERHEAD CONTROL REGISTER
ADDRESS 0X15
DEFAULT = 8’B00000000
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Type
—
—
—
—
—
R/W
Symbol
—
—
—
—
—
LOSIns
Function
Reserved
Reserved
Reserved
Reserved
Reserved
Insert loss of signal into transmit stream. The transmit stream is forced to
all zeroes if this bit is asserted.
Invert B1 byte before insertion into transmit stream. controls error
insertion into the section B1 byte.
Insert framing error. Inserts a single bit error continuously into the most
significant bit of the A1 section overhead byte. When this bit is set to
logic one, the A1 bytes transmitted are 0x76 instead of 0xf6.
Bit 1
R/W
B1Inv
Bit 0
R/W
frErrIns
相關(guān)PDF資料
PDF描述
IDT77155L155PX PHY (TC-PMD) USER NETWORK INTERFACE FOR 155 MBPS ATM NETWORK APPLICATIONS
IDT77301 UTOPIAFIFO 1 TO 4 (128 x 9 x 4) DEMULTIPLEXER-FIFO
IDT77301L12PF UTOPIAFIFO 1 TO 4 (128 x 9 x 4) DEMULTIPLEXER-FIFO
IDT77301L12PFI UTOPIAFIFO 1 TO 4 (128 x 9 x 4) DEMULTIPLEXER-FIFO
IDT77305 UTOPIAFIFO 4 PORT MULTIPLEXER FIFO
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT77155L155PX 制造商:INT_DEV_TECH 功能描述:
IDT77201L25PF 制造商:Integrated Device Technology Inc 功能描述:
IDT77211L155PQF 制造商:Integrated Device Technology Inc 功能描述:ATM/SONET SEGMENTATION AND REASSEMBLY CIRCUIT, 208 Pin, Plastic, QFP
IDT77V011L155DA 功能描述:INTERFACE DPI-UTOPIA 144-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁(yè)面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2
IDT77V011L155DA8 功能描述:INTERFACE DPI-UTOPIA 144-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁(yè)面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2
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