- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1924 > IDT82P5088BBG (IDT, Integrated Device Technology Inc)IC LIU T1/E1/J1 OCTAL 256PBGA PDF資料下載
參數(shù)資料
| 型號： | IDT82P5088BBG |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 58/81頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU T1/E1/J1 OCTAL 256PBGA |
| 標準包裝： | 90 |
| 功能： | 線路接口單元（LIU） |
| 接口： | E1，J1，T1 |
| 電路數(shù)： | 8 |
| 電源電壓： | 1.8V, 3.3V |
| 功率（瓦特）： | 2.57W |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 256-BGA |
| 供應(yīng)商設(shè)備封裝： | 256-PBGA（17x17） |
| 包裝： | 托盤 |
| 包括： | 集成式時鐘適配器 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁當前第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁
IDT82P5088
UNIVERSAL OCTAL T1/E1/J1 LIU WITH INTEGRATED CLOCK ADAPTER
IEEE STD 1149.1 JTAG TEST ACCESS PORT
61
February 5, 2009
5.1
JTAG INSTRUCTIONS AND INSTRUCTION REG-
ISTER
The IR (Instruction Register) with instruction decode block is used to
select the test to be executed or the data register to be accessed or both.
The instructions are shifted in LSB first to this 3-bit register. See Table-
68 for details of the codes and the instructions related.
5.2
JTAG DATA REGISTER
5.2.1
DEVICE IDENTIFICATION REGISTER (IDR)
The IDR can be set to define the producer number, part number and
the device revision, which can be used to verify the proper version or re-
vision number that has been used in the system under test. The IDR is
32 bits long and is partitioned as in Table-69. Data from the IDR is shifted
out to TDO LSB first.
5.2.2
BYPASS REGISTER (BR)
The BR consists of a single bit. It can provide a serial path between the
TDI input and TDO output, bypassing the BSR to reduce test access times.
5.2.3
BOUNDARY SCAN REGISTER (BSR)
The BSR can apply and read test patterns in parallel to or from all the
digital I/O pins. The BSR is a 98 bits long shift register and is initialized and
read using the instruction EXTEST or SAMPLE/PRELOAD. Each pin is
related to one or more bits in the BSR. For details, please refer to the BSDL
file.
Table-68 Instruction Register Description
IR CODE
INSTRUCTION
COMMENTS
000
Extest
The external test instruction allows testing of the interconnection to other devices. When the current instruction is the
EXTEST instruction, the boundary scan register is placed between TDI and TDO. The signal on the input pins can be sam-
pled by loading the boundary scan register using the Capture-DR state. The sampled values can then be viewed by shifting
the boundary scan register using the Shift-DR state. The signal on the output pins can be controlled by loading patterns
shifted in through input TDI into the boundary scan register using the Update-DR state.
100
Sample / Preload The sample instruction samples all the device inputs and outputs. For this instruction, the boundary scan register is placed
between TDI and TDO. The normal path between IDT82P5088 logic and the I/O pins is maintained. Primary device inputs
and outputs can be sampled by loading the boundary scan register using the Capture-DR state. The sampled values can
then be viewed by shifting the boundary scan register using the Shift-DR state.
110
Idcode
The identification instruction is used to connect the identification register between TDI and TDO. The device's identification
code can then be shifted out using the Shift-DR state.
111
Bypass
The bypass instruction shifts data from input TDI to output TDO with one TCK clock period delay. The instruction is used to
bypass the device.
Table-69 Device Identification Register Description
Bit No.
Comments
0
Set to ‘1’
1-11
Producer Number
12-27
Part Number
28-31
Device Revision
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT82V2041EPPG | IC LIU T1/J1/E1 1CH 44-TQFP |
| IDT82V2042EPFG | IC LIU T1/J1/E1 2CH SHORT 80TQFP |
| IDT82V2044EPFG | IC LIU T1/E1 QUAD SHORT 128-TQFP |
| IDT82V2048DAG | IC LIU T1/E1 8CH SHORT 144-TQFP |
| IDT82V2048EDR | IC LIU T1/E1 8CH SHORT 208-TQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT82P5088BBG8 | 制造商:Integrated Device Technology Inc 功能描述:IC LIU T1/E1/J1 OCTAL 256PBGA |
| IDT82V1054A | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE |
| IDT82V1054APF | 功能描述:IC PCM CODEC 4CH MPI 3.3V 64TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| IDT82V1054APF8 | 功能描述:IC PCM CODEC 4CH MPI 3.3V 64TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| IDT82V1054APFG | 功能描述:IC PCM CODEC 4CH MPI 3.3V 64TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。