參數(shù)資料
型號: IDT82V3255TFG8
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 15/132頁
文件大?。?/td> 0K
描述: IC PLL WAN SMC STRATUM 3 64-TQFP
標準包裝: 1,250
類型: 時鐘/頻率發(fā)生器,多路復用器
PLL:
主要目的: 以太網(wǎng),SONET/SDH,Stratum
輸入: CMOS,LVDS,PECL
輸出: CMOS,LVDS,PECL
電路數(shù): 1
比率 - 輸入:輸出: 3:3
差分 - 輸入:輸出: 是/是
頻率 - 最大: 622.08MHz
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應商設(shè)備封裝: 64-TQFP(10x10)
包裝: 帶卷 (TR)
其它名稱: 82V3255TFG8
IDT82V3255
WAN PLL
Thermal Management
111
December 3, 2008
7
THERMAL MANAGEMENT
The device operates over the industry temperature range -40°C ~
+85°C. To ensure the functionality and reliability of the device, the maxi-
mum junction temperature Tjmax should not exceed 125°C. In some
applications, the device will consume more power and a thermal solution
should be provided to ensure the junction temperature Tj does not
exceed the Tjmax.
7.1
JUNCTION TEMPERATURE
Junction temperature Tj is the temperature of package typically at the
geographical center of the chip where the device's electrical circuits are.
It can be calculated as follows:
Equation 1: Tj = TA + P X θJA
Where:
θJA = Junction-to-Ambient Thermal Resistance of the Package
Tj = Junction Temperature
TA = Ambient Temperature
P = Device Power Consumption
In order to calculate junction temperature, an appropriate
θJA must
be used. The
θJA is shown in Table 36:
Power consumption is the core power excluding the power dissipated
in the loads. Table 35 provides power consumption in special environ-
ments.
7.2
EXAMPLE OF JUNCTION TEMPERATURE
CALCULATION
Assume:
TA = 85°C
θJA = 21.7°C/W (TQFP/EDG64 Soldered & when airfow rate is 0 m/
s)
P = 1.57W
The junction temperature Tj can be calculated as follows:
Tj = TA + P X θJA = 85°C + 1.57W X 21.7°C/W = 119.1°C
The junction temperature of 119.1°C is below the maximum junction
temperature of 125°C so no extra heat enhancement is required.
In some operation environments, the calculated junction temperature
might exceed the maximum junction temperature of 125°C and an exter-
nal thermal solution such as a heatsink is required.
7.3
HEATSINK EVALUATION
A heatsink is expanding the surface area of the device to which it is
attached.
θJA is now a combination of device case and heat-sink thermal
resistance, as the heat flowing from the die junction to ambient goes
through the package and the heatsink.
θJA can be calculated as follows:
Equation 2:
θJA = θJC + θCH+ θHA
Where:
θJC = Junction-to-Case Thermal Resistance
θCH = Case-to-Heatsink Thermal Resistance
θHA = Heatsink-to-Ambient Thermal Resistance
θCH+ θHA determines which heatsink and heatsink attachment can
be selected to ensure the junction temperature does not exceed the
maximum junction temperature. According to Equation 1 and 2,
θCH+ θHA can be calculated as follows:
Equation 3:
θCH+ θHA = (Tj - TA) / P - θJC
Assume:
Tj = 125°C (Tjmax)
TA = 85°C
P = 1.57W
θJC = 12.6°C/W (TQFP/EDG64)
θCH+ θHA can be calculated as follows:
θCH+ θHA = (125°C - 85°C ) / 1.57W - 12.6°C/W = 12.9°C/W
That is, if a heatsink and heatsink attachment whose θCH+ θHA is
below or equal to 12.9°C/W is used in such operation environment, the
junction temperature will not exceed the maximum junction temperature.
Table 35: Power Consumption and Maximum Junction Temperature
Package
Power
Consumption (W)
Operating
Voltage
(V)
TA (°C)
Maximum
Junction
Temperature (°C)
LQFP/PP64
1.57
3.6
85
125
TQFP/EDG64
1.57
3.6
85
125
Table 36: Thermal Data
Package
Pin Count Thermal Pad
θJC (°C/W)
θJB (°C/W)
θJA (°C/W) Air Flow in m/s
012345
LQFP/PP64
64
No
12.3
35.1
43.1
40
38.1
37.3
36.5
36.1
TQFP/EDG64
64
Yes/Exposed
12.6
35.3
37.0
32.1
30.4
29.4
28.7
28.1
TQFP/EDG64
64
Yes/Soldered
12.6
1.3
21.7
17.3
16.2
15.6
15.2
14.9
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