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| 型號： | INTELDX2 |
| 廠商： | Intel Corp. |
| 英文描述： | High-Performance 32-Bit Embedded Processor(高性能32位嵌入式處理器) |
| 中文描述： | 高性能32位嵌入式處理器（高性能32位嵌入式處理器） |
| 文件頁數(shù)： | 27/48頁 |
| 文件大?。?/td> | 486K |
| 代理商： | INTELDX2 |
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Embedded IntelDX2 Processor
23
Table 9. Output Pins
Name
Active Level
Output Signal
Floated During
Address Hold
Floated During
Bus Hold
During Stop Grant and
Stop Clock States
BREQ
HIGH
Previous State
HLDA
HIGH
As per HOLD
BE3#-BE0#
LOW
Previous State
PWT, PCD
HIGH
Previous State
W/R#, M/IO#, D/C#
HIGH/LOW
Previous State
LOCK#
LOW
HIGH (inactive)
PLOCK#
LOW
HIGH (inactive)
ADS#
LOW
HIGH (inactive)
BLAST#
LOW
Previous State
PCHK#
LOW
Previous State
FERR#
LOW
Previous State
A3-A2
HIGH
Previous State
SMIACT#
LOW
Previous State
NOTES:
the processor entered the Stop Grant state. This conserves power by preventing the signal pin from floating.
The term “Previous State” means that the processor maintains the logic level applied to the signal pin just before
Table 10. Input/Output Pins
Name
Active Level
Output Signal
Floated During
Address Hold
Floated During
Bus Hold
During Stop Grant and
Stop Clock States
D31-D0
HIGH
Floated
DP3–DP0
HIGH
Floated
A31-A4
HIGH
Previous State
NOTES:
processor entered the Stop Grant state. This conserves power by preventing the signal pin from floating.
The term “Previous State” means that the processor maintains the logic level applied to the signal pin just before the
Table 11. Test Pins
Name
Input or Output
Sampled/ Driven On
TCK
Input
N/A
TDI
Input
Rising Edge of TCK
TDO
Output
Failing Edge of TCK
TMS
Input
Rising Edge of TCK
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