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參數(shù)資料
| 型號： | IS43R32400A |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | 4Meg x 32 128-MBIT DDR SDRAM |
| 中文描述： | 4Meg × 32的128 - Mbit DDR SDRAM內(nèi)存 |
| 文件頁數(shù)： | 13/25頁 |
| 文件大?。?/td> | 1295K |
| 代理商： | IS43R32400A |
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. 00D
02/15/06
13
ISSI
IS43R32400A
FUNCTIONAL DESCRIPTION
The 128Mbit DDR SDRAM is a high-speed CMOS
device with four banks that operate at 2.5V. Each
32Mbit bank is organized as 4,096 rows of 256
columns for the x32 options. Pre-fetch architecture
allows Read and Write accesses to be double-data
rate and burst oriented. Accesses start at a selected
column location and continue every half-clock cycle
for a programmed number of times. The Read or
Write operation begins with an Active command to
transmit the selected bank and row (A0-A11 bits are
sampled). This is followed by a Read or Write
command to sample the address bits again to
determine the first column to access. When access
to the memory is not necessary, the device can be
put into a Power Down mode in which current con-
sumption is minimized. Prior to normal operation, the
device must be initialized in a defined procedure to
function properly. The following sections describe
the steps of initialization, the mode register defini-
tions, command descriptions, and device operation.
INITIALIZATION
The DDR SDRAM must be powered-on and initial-
ized in a series of defined steps for proper operation.
First, power is applied simultaneously to VDD and
VDDQ. After these reaching stable values, a VREF
is ramped up. If this sequence is not followed, latch-
up could occur and cause damage to the device.
The input CKE must be asserted and held to a
LVCMOS Low level during this time to prevent
unwanted commands from being executed. The
outputs I/O and DQS remain in high impedance until
driven during a normal operation. Once VDD, VDDQ,
VREF, and CKE are stable values, the clock inputs
can begin to be applied. For a time period of at least
200μs, valid CLK and
CLK
cycles must be applied
prior to any command being issued to the device.
CKE needs to then be raised to SSTL 2 logic High
and issue a NOP or Deselect command to initialize
the internal logic of the DRAM. Next, a Pre-charge
All command is given to the device, followed by a
NOP/Deselect command on each clock cycle for at
least tRP. The Load Extended Mode Register
should be issued to enable DLL, followed by another
series of NOP/Deselect commands for at least tMRD.
After this time, the Load Mode Register command
should be issued to reset the DLL, again followed by
a series of NOP or Deselect commands for at least
tMRD. (Note: whenever the DLL is reset, 200 clock
cycles must occur prior to any Read command.) The
Pre-charge command is then issued, with NOP/
Deselect commands for at least tRP. Next, two Auto-
Refresh commands are issued, each followed by
NOP/Deselect commands for at least tRFC. At this
point, the JEDEC specification recommends that a
DDR SDRAM receive another Load Mode Register
command to clear the DLL, with NOP/Deselect
commands for at least tMRD. The device is now
ready to receive a valid command for normal opera-
tion.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IS43R32400A-5B | 4Meg x 32 128-MBIT DDR SDRAM |
| IS43R32400A-5BL | 4Meg x 32 128-MBIT DDR SDRAM |
| IS43R32400A-6B | 4Meg x 32 128-MBIT DDR SDRAM |
| IS43R32400A-6BI | 4Meg x 32 128-MBIT DDR SDRAM |
| IS43R32400A-6BL | 4Meg x 32 128-MBIT DDR SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS43R32400A-5B | 功能描述:動態(tài)隨機存取存儲器 128M 2.5v 4Mx32 400MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube |
| IS43R32400A-5BL | 功能描述:動態(tài)隨機存取存儲器 128M 2.5v 4Mx32 400MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube |
| IS43R32400A-5BL-TR | 功能描述:動態(tài)隨機存取存儲器 128M 2.5v 4Mx32 400MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube |
| IS43R32400A-5B-TR | 功能描述:動態(tài)隨機存取存儲器 128M 2.5v 4Mx32 400MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube |
| IS43R32400A-6B | 功能描述:動態(tài)隨機存取存儲器 128M 2.5v 4Mx32 333MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube |
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