參數(shù)資料
型號(hào)： ISL12082IB8Z
廠商： Intersil
文件頁數(shù)： 3/26頁
文件大?。?/td> 0K
描述： IC RTC I2C LO-POWER 8-SOIC
標(biāo)準(zhǔn)包裝： 980
類型： 時(shí)鐘/日歷
特點(diǎn)： 警報(bào)器，閏年，監(jiān)視計(jì)時(shí)器
時(shí)間格式： HH:MM:SS:hh（12/24 小時(shí)）
數(shù)據(jù)格式： YY-MM-DD-dd
接口： I²C，2 線串口
電源電壓： 2.7 V ~ 5.5 V
電壓 - 電源，電池： 1.8 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SOIC
包裝： 管件
11
FN6731.3
November 24, 2008
3. Alarm (6 bytes): Address 0Ch to 11h.
4. TIMER (4 bytes): Address 12h to 14h, with address 14h
as write-only byte and read back ‘0’..
There are no addresses above 1Fh.
Address 15h to 1Eh are not used. Reads or writes to
addresses 15h to 1Eh will not affect operation of the device
but should be avoided.
Write capability is allowable into the RTC registers (00h to
06h, and 1Fh) only when the WRTC bit (bit 4 of address 07h)
is set to “1”. A multi-byte read or write operation is limited
to one section per operation. Access to another section
requires a new operation. A read or write can begin at any
address within the section.
A register can be read by performing a random read at any
address at any time. This returns the contents of that register
location. Additional registers are read by performing a
sequential read. For the RTC and alarm registers, the read
instruction latches all clock registers into a buffer, so an
update of the clock does not change the time being read. A
sequential read will not result in the output of data from the
memory array. At the end of a read, the master supplies a
stop condition to end the operation and free the bus. After a
read, the address remains at the previous address +1 so the
user can execute a current address read and continue
reading the next register.
TABLE 1. REGISTER MEMORY MAP
ADDR. SECTION
REG
NAME
BIT
REG
7
6
5
4
3
2
1
0
RANGE
DEFAULT
1Fh
RTC
SS
SS23
SS22
SS21
SS20
SS13
SS12
SS11
SS10
0 to 99
00h
SC
0
SC22
SC21
SC20
SC13
SC12
SC11
SC10
0 to 59
00h
01h
MN
OF
MN22
MN21
MN20
MN13
MN12
MN11
MN10
0 to 59
80h
02h
HR
MIL
0
HR21
HR20
HR13
HR12
HR11
HR10
0 to 23
00h
03h
DT
0
DT21
DT20
DT13
DT12
DT11
DT10
1 to 31
00h
04h
MO
0
MO20
MO13
MO12
MO11
MO10
1 to 12
00h
05h
YR
YR23
YR22
YR21
YR20
YR13
YR12
YR11
YR10
0 to 99
00h
06h
DW
00000
DW12
DW11
DW10
0 to 6
00h
07h
Status
SR
ARST
XSTOP
RESEAL
WRTC
TMR
ALM
BAT
RTCF
N/A
03h
08h
Control
INT
IM
ALME
LPMODE
FOBATB
IRQ2E
IRQ1E
FO1
FO0
N/A
00h
09h
TMRC
TIM
TMRE
TMOD1
TMOD0
0
TCLK1
TCLK0
N/A
00h
0Ah
ATR
BMATR1
BMATR0
ATR5
ATR4
ATR3
ATR2
ATR1
ATR0
N/A
00h
0Bh
DTR
0
DTR5
DTR4
DTR3
DTR2
DTR1
DTR0
N/A
80h
0Ch
Alarm0
SCA
ESCA
ASC22
ASC21
ASC20
ASC13
ASC12
ASC11
ASC10
00 to 59
00h
0Dh
MNA
EMNA
AMN22
AMN21
AMN20
AMN13
AMN12
AMN11
AMN10
00 to 59
00h
0Eh
HRA
EHRA
0
AHR21
AHR20
AHR13
AHR12
AHR11
AHR10
0 to 23
00h
0Fh
DTA
EDTA
0
ADT21
ADT20
ADT13
ADT12
ADT11
ADT10
1 to 31
00h
10h
MOA
EMOA
0
AMO20
AMO13
AMO12
AMO11
AMO10
1 to 12
00h
11h
DWA
EDWA
0000
ADW12
ADW11
ADW10
0 to 6
00h
12h
TIMER
TDAT
TDAT7
TDAT6
TDAT5
TDAT4
TDAT3
TDAT2
TDAT1
TDAT0
0 to 255
00h
13h
TCNT
TCNT7
TCNT6
TCNT5
TCNT4
TCNT3
TCNT2
TCNT1
TCNT0
0 to 255
00h
14h
TSDAT
X
TSDAT6
TSDAT5
TSDAT4
TSDAT3
TSDAT2
TSDAT1
TSDAT0
0 to 99
00h
ISL12082
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