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參數(shù)資料
| 型號(hào)： | ISL1221IUZ-T |
| 廠商： | Intersil |
| 文件頁數(shù)： | 2/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC LP BATT BACK SRAM 10MSOP |
| 產(chǎn)品培訓(xùn)模塊： | Solutions for Industrial Control Applications |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 時(shí)間事件記錄器 |
| 特點(diǎn)： | 警報(bào)器，閏年，SRAM |
| 存儲(chǔ)容量： | 2B |
| 時(shí)間格式： | HH:MM:SS（12/24 小時(shí)） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 電壓 - 電源，電池： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 1245 (CN2011-ZH PDF) |
| 其它名稱： | ISL1221IUZ-TDKR |
10
FN6316.1
July 15, 2010
Event Detect Timing Diagram with
Sampling Mode Enabled
Case 1, Switch Opened Before Ipu
Case 2, Switch Opened After Ipu
Case 3, Switch Bounced
The ISL1221 can operate independently or in conjunction
with a microcontroller for low power operation modes or in
battery backup modes.
The event detection and time stamp circuits operate in either
main VDD power or battery backup mode.
Users have the option to connect EVIN (see EVINEB bit) to an
internal pull-up current source that operates at 1A (always on
mode), which can drop to 400nA in battery backup mode. User
selectable event sampling modes are also available which will
effectively reduce power consumption with 1/4-Hz, 1-Hz and 2-
Hz sample detection rates. The EVIN input is pulsed ON/OFF
when in sampling mode for power savings advantages (see
The EVIN also has a user selectable time based hysteresis
filter (see EHYS bits) to implement switch de-bouncing
during an event detection. The EVIN signal must be high for
the duration of the selected time period. The time periods
available are 0 times delay (no time based hysteresis) to
Real Time Clock Operation
The Real Time Clock (RTC) uses an external 32.768kHz
quartz crystal to maintain an accurate internal representation
of second, minute, hour, day of week, date, month, and year.
The RTC also has leap-year correction. The clock also
corrects for months having fewer than 31 days and has a bit
that controls 24 hour or AM/PM format. When the ISL1221
powers up after the loss of both VDD and VBAT, the clock will
not begin incrementing until at least one byte is written to the
clock register.
8 CLKS (8x)
15 CLKS (8x)
OFF
ON
OPEN
CLOSED
LOW
HIGH
LOW
EVDET
EVIN
EXT.
SWITCH
Ipu
8 CLKS (8x)
15 CLKS (8x)
OFF
ON
OPEN
CLOSED
LOW
HIGH
LOW
EVDET
EVIN
EXT.
SWITCH
Ipu
15 CLKS (8x)
OFF
ON
OPEN
CLOSED
LOW
HIGH
LOW
EVDET
EVIN
EXT.
SWITCH
Ipu
8 CLKS (8x)
TABLE 1.
ΔIDD (VDD = 3V, tHYS = 3.9ms)
fSMP
DELTA IDD
1/4Hz
20.5nA
1Hz
82nA
2Hz
164nA
TABLE 2.
ΔIDD (VDD = 5.0V, tHYS = 3.9ms)
fSMP
DELTA IDD
1/4Hz
65.8nA
1Hz
263.3nA
2Hz
526.5nA
TABLE 3.
ΔIDD (VDD = 3.0V, tHYS = 15.625ms)
fSMP
DELTA IDD
1/4Hz
82nA
1Hz
328nA
2Hz
656.3nA
TABLE 4.
ΔIDD (VDD = 5.0V, tHYS = 15.625ms)
fSMP
DELTA IDD
1/4Hz
264nA
1Hz
1.05A
2Hz
2.1A
ISL1221
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL14010 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Jitter Clock Generators for Set-Top Box |
| ISL14010IRZ | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 REAL TIME CLKRTC 16LD 3X3 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| ISL14010IRZ-T | 功能描述:實(shí)時(shí)時(shí)鐘 REAL TIME CLKRTC 16LD 3X3 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL14011 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Jitter Clock Generators for Set-Top Box |
| ISL14011IRZ | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 REAL TIME CLKRTC 16LD 3X3 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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