- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383155 > ISL6540A (Intersil Corporation) Single-Phase Buck PWM Controller with Integrated High Speed MOSFET Driver and Pre-Biased Load Capability PDF資料下載
參數(shù)資料
| 型號： | ISL6540A |
| 廠商： | Intersil Corporation |
| 英文描述： | Single-Phase Buck PWM Controller with Integrated High Speed MOSFET Driver and Pre-Biased Load Capability |
| 中文描述： | 單相降壓PWM控制器，帶有集成的高速MOSFET驅(qū)動器和預(yù)偏置負載能力 |
| 文件頁數(shù)： | 11/20頁 |
| 文件大小： | 430K |
| 代理商： | ISL6540A |
11
FN6288.2
March 12, 2007
Functional Description
Initialization
The ISL6540A automatically initializes upon receipt of power
without requiring any special sequencing of the input
supplies. The Power-On Reset (POR) function continually
monitors the input supply voltages (PVCC, VFF, VCC) and
the voltage at the EN pin. Assuming the EN pin is pulled to
above ~0.50V, the POR function initiates soft-start operation
after all input supplies exceed their POR thresholds.
VIN
With all input supplies above their POR thresholds, driving
the EN pin above 0.50V initiates a soft-start cycle. In addition
to normal TTL logic, the enable pin can be used as a voltage
monitor with programmable hysteresis through the use of the
internal 10
μ
A sink current and an external resistor divider.
This feature is especially designed for applications that have
input rails greater than a 3.3V and require a specific input rail
POR and Hysteresis levels for better undervoltage
protection. Consider for a 12V application choosing
R
UP
= 100k
Ω
and R
DOWN
= 5.76k
Ω
there by setting the
rising threshold (V
EN_RTH
) to ~10V and the falling threshold
(V
EN_FTH
) to ~9V, for 1V of hysteresis (V
EN_HYS
). Care
should be taken to prevent the voltage at the EN pin from
exceeding VCC when using the programmable UVLO
functionality.
Soft-Start
The POR function activates the internal 37
μ
A OTA which
begins charging the external capacitor (C
SS
) on the SS pin to a
target voltage of VCC. The ISL6540A’s soft-start logic
continues to charge the SS pin until the voltage on COMP
exceeds the bottom of the oscillator ramp, at which point, the
driver outputs are enabled, with the low side MOSFET first
being held low for 200ns to provide for charging of the bootstrap
capacitor. Once the driver outputs are enabled, the OTA’s target
voltage is then changed to the margined (if margining is being
used) reference voltage (V
REF_MARG
), and the SS pin is
ramped up or down accordingly. This method reduces startup
surge currents due to a pre-charged output by inhibiting
regulator switching until the control loop enters its linear region.
By ramping the positive input of the error amplifier to VCC and
then to V
REF_MARG
, it is even possible to mitigate surge
currents from outputs that are pre-charged above the set output
voltage. As the SS pin connects directly to the non-inverting
input of the error amplifier, noise on this pin should be kept to a
minimum through careful routing and part placement. To
prevent noise injection into the error amplifier the SS capacitor
should be located within 150 mils of the SS and GND pins.
Soft-start is declared done when the drivers have been enabled
and the SS pin is within ±3mV of V
REF_MARG
.
Power Good
The power good comparator references the voltage on the
soft-start pin to prevent accidental tripping during margining.
The trip points are shown on Figure 3. Additionally, power
good will not be asserted until after the completion of the
soft-start cycle. A 0.1
μ
F capacitor at the PG_DLY pin will add
an additional ~7ms delay to the assertion of power good.
PG_DLY does not delay the de-assertion of power good.
Under and Overvoltage Protection
The Undervoltage (UV) and Overvoltage (OV) protection
circuitry compares the voltage on the VMON pin with the
reference that tracks with the margining circuitry to prevent
accidental tripping. UV and OV functionality is not enabled
until the end of soft-start.
VCC POR
VFF POR
PVCC POR
EN POR
SOFT-START
HIGH = ABOVE POR; LOW = BELOW POR
AND
FIGURE 1. SOFT-START INITIALIZATION LOGIC
V
REF
I
EN_HYS
=10
μ
A
R
UP
R
DOWN
R
UP
V
EN_HYS
-------------------------
=
R
DOWN
R
V
EN_REF
EN_FTH
---------------------------–
=
V
EN_FTH
V
EN_RTH
V
EN_HYS
–
=
Sys_Enable
FIGURE 2. ENABLE POR CIRCUIT
FIGURE 3. UNDERVOLTAGE-OVERVOLTAGE WINDOW
-15%
-9%
V
REF_MARG
+9%
+15%
VMON
UV
UV
OV
GOOD
GOOD
T
PG_DLY
C
PG_DLY
A
---------------
=
ISL6540A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISL6540ACRZ | Single-Phase Buck PWM Controller with Integrated High Speed MOSFET Driver and Pre-Biased Load Capability |
| ISL6540ACRZA | Single-Phase Buck PWM Controller with Integrated High Speed MOSFET Driver and Pre-Biased Load Capability |
| ISL6540AIRZ | Single-Phase Buck PWM Controller with Integrated High Speed MOSFET Driver and Pre-Biased Load Capability |
| ISL6540AIRZA | Single-Phase Buck PWM Controller with Integrated High Speed MOSFET Driver and Pre-Biased Load Capability |
| ISL6545 | 5V or 12V Single Synchronous Buck Pulse-Width Modulation (PWM) Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL6540ACRZ | 功能描述:IC REG CTRLR BUCK PWM VM 28-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標(biāo)準包裝:75 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:1MHz 占空比:81% 電源電壓:4.3 V ~ 13.5 V 降壓:是 升壓:是 回掃:是 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:0°C ~ 70°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 包裝:管件 產(chǎn)品目錄頁面:1051 (CN2011-ZH PDF) 其它名稱:296-2543-5 |
| ISL6540ACRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 28-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 特色產(chǎn)品:LM3753/54 Scalable 2-Phase Synchronous Buck Controllers 標(biāo)準包裝:1 系列:PowerWise® PWM 型:電壓模式 輸出數(shù):1 頻率 - 最大:1MHz 占空比:81% 電源電壓:4.5 V ~ 18 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-5°C ~ 125°C 封裝/外殼:32-WFQFN 裸露焊盤 包裝:Digi-Reel® 產(chǎn)品目錄頁面:1303 (CN2011-ZH PDF) 其它名稱:LM3754SQDKR |
| ISL6540ACRZ-TR5453 | 制造商:Intersil Corporation 功能描述:STD. ISL6540ACRZ-T W/GOLD BOND WIRE ONLY - Tape and Reel |
| ISL6540AIRZ | 功能描述:IC REG CTRLR BUCK PWM VM 28-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準包裝:2,500 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:275kHz 占空比:50% 電源電壓:18 V ~ 110 V 降壓:無 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:是 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 包裝:帶卷 (TR) |
| ISL6540AIRZA | 功能描述:IC REG CTRLR BUCK PWM VM 28-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準包裝:2,500 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:275kHz 占空比:50% 電源電壓:18 V ~ 110 V 降壓:無 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:是 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 包裝:帶卷 (TR) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。