參數(shù)資料
型號(hào): ISP1161BD
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Full-speed Universal Serial Bus single-chip host and device controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁數(shù): 3/127頁
文件大?。?/td> 2762K
代理商: ISP1161BD
Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Product data
Rev. 01 — 3 July 2001
3 of 130
9397 750 08313
Philips Electronics N.V. 2001. All rights reserved.
2.
Features
I
Complies with Universal Serial Bus Specification Rev 1.1
I
Combines HC and DC in a single chip
I
On-chip DC complies with most Device Class specifications
I
Both HC and DC can be accessed by an external microprocessor via separate I/O
port addresses
I
Selectable one or two downstream ports for HC and one upstream port for DC
I
High speed parallel interface to most of the generic microprocessors and
Reduced Instruction Set Computer (RISC) processors (Hitachi SH-3 and SH-4,
MIPS-based RISC, ARM7/9, StrongARM, etc.). Maximum 15 Mbyte/s data
transfer rate between microprocessor and the HC, 11.1 Mbyte/s data transfer rate
between microprocessor and the DC
I
Supports single-cycle burst mode and multiple-cycle burst mode DMA operations
I
Up to 14 programmable USB endpoints with 2 fixed control IN/OUT endpoints for
the DC
I
Built in separate FIFO buffer RAM for HC (4 kbytes) and DC (2462 bytes)
I
Endpoints with double buffering to increase throughput and ease real-time data
transfer for both DC transfers and HC isochronous (ISO) transactions
I
6 MHz crystal oscillator with integrated PLL for low EMI
I
Controllable LazyClock (24 kHz) output during ‘suspend’
I
Clock output with programmable frequency (3 to 48 MHz)
I
Software controlled connection to the USB bus (SoftConnect) on upstream port
for the DC
I
Good USB connection indicator that blinks with traffic (GoodLink) for the DC
I
Built-in software selectable internal 15 k
pull-down resistors for HC downstream
ports
I
Dedicated pins for suspend sensing output and wakeup control input for flexible
applications
I
Global hardware reset input pin and separate internal software reset circuits for
HC and DC
Fig 3.
ISP1161 operating as both USB host and device simultaneously.
MGT928
μ
P SYSTEM
MEMORY
μ
P
ISP1161
HOST/
DEVICE
μ
P bus I/F
USB I/F
USB device
USB cable
USB cable
USB host
USB I/F
USB I/F
EMBEDDED SYSTEM
PC
(host)
USB I/F
PRINTER
(device)
DSC
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ISP1181ABS,518 功能描述:USB 接口集成電路 USB 1.1 ADV DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20