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參數(shù)資料
| 型號(hào)： | ISP1362EE |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 總線控制器 |
| 英文描述： | Single-chip Universal Serial Bus On-The-Go controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PBGA64 |
| 封裝： | 6 X 6 MM, 0.80 HEIGHT, PLASTIC, MO-195, SOT-543-1, TFBGA-64 |
| 文件頁(yè)數(shù)： | 58/150頁(yè) |
| 文件大?。?/td> | 647K |
| 代理商： | ISP1362EE |
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Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
—
06 January 2004
58 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Isochronous endpoints:
A DMA transfer to or from an isochronous endpoint can be
terminated by any of the following conditions (bit names refer to the
DcDMACon
fi
guration register, see
Table 118
and
Table 119
):
The DMA transfer completes as programmed in the DcDMACounter register
(CNTREN = 1)
An End-Of-Packet (EOP) signal is detected
DMA operation is disabled by clearing bit DMAEN.
13.5 ISP1362 DC suspend and resume
13.5.1
Suspend conditions
The DC in the ISP1362 detects a USB suspend condition in either of the following
cases:
Constant idle state is present on the USB bus for 3 ms.
V
BUS
is lost.
Bus-powered devices that are suspended must not consume more than 500
μ
A of
current. This is achieved by shutting down the power to system components or
supplying them with a reduced voltage.
The steps leading the DC to the suspend state are as follows:
1. In the event of no SOF for 3 ms, the DC in the ISP1362 sets bit SUSPND of the
DcInterrupt register. This will generate an interrupt if bit IESUSP of the
DcInterruptEnable register is set.
2. When the
fi
rmware detects a suspend condition (through the IESUSP), it must
prepare all system components for the suspend state:
a. All the signals connected to the DC in the ISP1362 must enter appropriate
states to meet the power consumption requirements of the suspend state.
b. All the input pins of the DC in the ISP1362 must have a CMOS logic 0 or
logic 1 level.
3. In the interrupt service routine, the
fi
rmware must check the current status of the
USB bus. When bit BUSTATUS of the DcInterrupt register is logic 0, the USB bus
has left the suspend mode and the process must be aborted. Otherwise, the next
step can be executed.
4. To meet the suspend current requirements for a bus-powered device, the internal
clocks must be switched off by clearing bit CLKRUN of the
DcHardwareCon
fi
guration register.
5. When the
fi
rmware has set and cleared the GOSUSP bit of the DcMode register,
the DC in the ISP1362 enters the suspend state. It sets the
D_SUSPEND/D_WAKEUP pin to HIGH and switches off the internal clocks after
2 ms.
Table 20:
EOT condition
DcDMACounter register zero
Recommended EOT usage for isochronous endpoints
OUT endpoint
do not use
IN endpoint
preferred
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISP1362EE,518 | 功能描述:USB 接口集成電路 USB OTG HOST RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1362EE,551 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1362EE,557 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1362EE/01 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Single-chip Universal Serial Bus On-The-Go controller |
| ISP1362EE-S | 功能描述:IC USB CTRL SNGL CHIP 64TFBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類(lèi)型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱(chēng):Q6396337A |
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