參數(shù)資料
型號: ISP1362EE
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Single-chip Universal Serial Bus On-The-Go controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封裝: 6 X 6 MM, 0.80 HEIGHT, PLASTIC, MO-195, SOT-543-1, TFBGA-64
文件頁數(shù): 75/150頁
文件大?。?/td> 647K
代理商: ISP1362EE
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
06 January 2004
75 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
15.1.5
HcInterruptEnable register (R/W: 04H/84H)
Each enable bit in the HcInterruptEnable register corresponds to an associated
interrupt bit in the HcInterruptStatus register. The HcInterruptEnable register is used
to control which events generate a hardware interrupt. When the following three
conditions occur:
A bit is set in the HcInterruptStatus register
The corresponding bit in the HcInterruptEnable register is set
The MasterInterruptEnable (MIE) bit is set.
Then, a hardware interrupt is requested on the host bus.
Writing logic 1 to a bit in the HcInterruptEnable register sets the corresponding bit,
whereas writing logic 0 to a bit in this register leaves the corresponding bit
unchanged. On a read, the current value of this register is returned.
Table 43
contains
the bit allocation of the register.
Code (Hex): 04
read
Code (Hex): 84
write
Table 42:
Bit
31 to 7
6
HcInterruptStatus register: bit description
Symbol
Description
-
reserved
RHSC
RootHubStatusChange:
This bit is set when the content of
HcRhStatus or the content of any of
HcRhPortStatus[NumberofDownstreamPort] has changed.
FNO
FrameNumberOver
fl
ow:
This bit is set when the MSB of
HcFmNumber (bit 15) changes from logic 0 to 1 or from logic 1
to 0.
UE
UnrecoverableError:
This bit is set when the HC detects a
system error not related to the USB. The HC should not proceed
with any processing nor signaling before the system error has
been corrected. The HCD clears this bit after the HC has been
reset.
Philips Host Controller Interface (PHCI): Always set to logic 0.
RD
ResumeDetected:
This bit is set when the HC detects that a
device on the USB is asserting resume signaling. It is the transition
from no resume signaling to resume signaling causing this bit to be
set. This bit is not set when the HCD sets the USBResume state.
SF
StartOfFrame:
At the start of each frame, this bit is set by the HC
and an SOF is generated.
-
reserved
SO
SchedulingOverrun:
This bit is set when the USB schedules for
current frame overruns. A scheduling overrun also causes the
SchedulingOverrunCount (SOC) of HcCommandStatus to be
incremented.
5
4
3
2
1
0
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