參數(shù)資料
型號: ISP1362EE
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Single-chip Universal Serial Bus On-The-Go controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封裝: 6 X 6 MM, 0.80 HEIGHT, PLASTIC, MO-195, SOT-543-1, TFBGA-64
文件頁數(shù): 82/150頁
文件大?。?/td> 647K
代理商: ISP1362EE
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
06 January 2004
82 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
15.3 HC Root Hub registers
All registers included in this partition are dedicated to the USB Root Hub, which is an
integral part of the HC although it is a functionally a separate entity. The HCD
emulates USB Driver (USBD) accesses to the Root Hub by using a register interface.
The HCD maintains many USB-de
fi
ned hub features that are not required to be
supported in hardware. For example, the Hub
s device, Con
fi
guration, Interface and
Endpoint Descriptors are maintained only in the HCD, as well as some static
fi
elds of
the Class Descriptor. The HCD also maintains and decodes the address of the Root
Hub device and other trivial operations that are better suited to software than to
hardware.
Root Hub registers are developed to maintain the similarity of bit organization and
operation to typical hubs found in the system.
Four registers are de
fi
ned as follows:
HcRhDescriptorA
HcRhDescriptorB
HcRhStatus
HcRhPortStatus[1:NDP].
Each register is read and written as a DWord. These registers are only written during
initialization to correspond with the system implementation. The HcRhDescriptorA
and HcRhDescriptorB registers should be implemented such that they are writeable,
regardless of the USB states of the HC. HcRhStatus and HcRhPortStatus must be
writeable during the USBOperational state.
15.3.1
HcRhDescriptorA register (R/W: 12H/92H)
The HcRhDescriptorA register is the
fi
rst register of two describing the characteristics
of the Root Hub. The bit allocation is given in
Table 55
.
Code (Hex): 12
read
Code (Hex): 92
write
Table 55:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcRhDescriptorA register: bit description
31
30
29
28
27
26
25
24
POTPGT[7:0]
1
R/W
20
reserved
-
-
12
NOCP
0
R/W
1
1
1
1
1
1
1
R/W
23
R/W
22
R/W
21
R/W
19
R/W
18
R/W
17
R/W
16
-
-
-
-
-
-
-
-
-
-
-
-
9
-
-
8
15
14
13
11
10
DT
0
R
reserved
-
-
OCPM
1
R/W
NPS
0
R/W
PSM
1
R/W
-
-
-
-
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