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| 型號： | ISP1561BM,557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP128 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-420-1, LQFP-128 |
| 文件頁數(shù)： | 22/103頁 |
| 文件大?。?/td> | 457K |
| 代理商： | ISP1561BM,557 |
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ISP1561_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 5 March 2007
25 of 103
NXP Semiconductors
ISP1561
HS USB PCI Host Controller
8.2.3.2
NEXT_ITEM_PTR register (address: value read from address 34h + 1h)
The Next Item Pointer (NEXT_ITEM_PTR) register (see Table 33) describes the location
of the next item in the function’s capability list. The value given is an offset into the
function’s PCI conguration space. If the function does not implement any other
capabilities dened by the PCI-SIG for inclusion in the capabilities list, or if power
management is the last item in the list, then this register must be set to 00h.
8.2.3.3
PMC register (address: value read from address 34h + 2h)
The Power Management Capabilities (PMC) register is a 2-byte register, and the bit
allocation is given in Table 34. This read-only register provides information on the
capabilities of the function related to power management.
[1]
X is 0 for OHCI1, OHCI2 and EHCI S1; X is 1 for EHCI S3.
[2]
X is 0 for OHCI1 and OHCI2; X is 1 for EHCI.
Table 33.
NEXT_ITEM_PTR register: bit description
Bit
Symbol
Access
Value
Description
7 to 0
NEXT_ITEM_
PTR[7:0]
R
00h
Next Item Pointer: This eld provides an offset into the function’s
PCI conguration space pointing to the location of the next item in the
function’s capability list. If there are no additional items in the
capabilities list, this register is set to 00h.
Table 34.
PMC register: bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
PME_S[4:0]
D2_S
D1_S
AUX_C[2:0]
Reset
X[1]
1X[2]
X[2]
1X[2]
Access
RRRRRR
RR
Bit
7
6
5
4
3
2
1
0
Symbol
AUX_C[2:0]
DSI
reserved
PMI
VER[2:0]
Reset
00000010
Access
RRR
-
RRRR
Table 35.
PMC register: bit description
Bit
Symbol
Description
15 to 11
PME_S[4:0]
PME Support: This 5-bit eld indicates the power states in which
the function may assert PME#. Logic 0 for any bit indicates that
the function is not capable of asserting the PME# signal while in
that power state.
PME_S[0] — PME# can be asserted from D0
PME_S[1] — PME# can be asserted from D1
PME_S[2] — PME# can be asserted from D2
PME_S[3] — PME# can be asserted from D3hot
PME_S[4] — PME# can be asserted from D3cold
10
D2_S
D2 Support: If this bit is logic 1, this function supports the D2
power management state. Functions that do not support D2 must
always return a value of logic 0 for this bit.
9
D1_S
D1 Support: If this bit is logic 1, this function supports the D1
power management state. Functions that do not support D1 must
always return a value of logic 0 for this bit.
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| ISP1561BMGA | 功能描述:IC USB HOST CTRL HI-SPD 128LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| ISP1561BMGE | 功能描述:IC USB PCI HOST CTRLR 128-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| ISP1561BMUM | 功能描述:IC USB HOST CTRL HI-SPD 128LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| ISP1562 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Hi-Speed USB PCI host controller |
| ISP1562BE | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Hi-Speed USB PCI host controller |
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