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參數資料
| 型號： | ISP1563BM |
| 廠商： | ST-ERICSSON |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-420-1, LQFP-100 |
| 文件頁數： | 35/102頁 |
| 文件大?。?/td> | 466K |
| 代理商： | ISP1563BM |
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ISP1563_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 15 March 2007
38 of 102
NXP Semiconductors
ISP1563
HS USB PCI Host Controller
9RWC
Remote Wake-up Connected: This bit indicates whether the Host Controller supports remote
wake-up signaling. If remote wake-up is supported and used by the system, it is the
responsibility of the system rmware to set this bit during POST. The Host Controller clears the
bit on a hardware reset but does not alter it on a software reset. Remote wake-up signaling of
the host system is host-bus-specic and is not described in this specication.
8IR
Interrupt Routing: This bit determines the routing of interrupts generated by events registered
in HcInterruptStatus. If clear, all interrupts are routed to the normal host bus interrupt
mechanism. If set, interrupts are routed to the system management interrupt. The HCD clears
this bit on a hardware reset, but it does not alter this bit on a software reset. The HCD uses this
bit as a tag to indicate the ownership of the Host Controller.
7 to 6
HCFS[1:0]
Host Controller Functional State for USB:
00b — USBRESET
01b — USBRESUME
10b — USBOPERATIONAL
11b — USBSUSPEND
A transition to USBOPERATIONAL from another state causes SOF generation to begin 1 ms
later. The HCD may determine whether the Host Controller has begun sending SOFs by reading
SF (bit 2 of HcInterruptStatus).
This eld may be changed by the Host Controller only when in the USBSUSPEND state. The
Host Controller may move from the USBSUSPEND state to the USBRESUME state after
detecting the resume signaling from a downstream port.
The Host Controller enters USBSUSPEND after a software reset; it enters USBRESET after a
hardware reset. The latter also resets the root hub and asserts subsequent reset signaling to
downstream ports.
5
BLE
Bulk List Enable: This bit is set to enable the processing of the bulk list in the next Frame. If
cleared by the HCD, processing of the bulk list does not occur after the next SOF. The Host
Controller checks this bit whenever it wants to process the list. When disabled, the HCD may
modify the list. If HcBulkCurrentED is pointing to an Endpoint Descriptor (ED) to be removed, the
HCD must advance the pointer by updating HcBulkCurrentED before re-enabling processing of
the list.
4
CLE
Control List Enable: This bit is set to enable the processing of the control list in the next frame.
If cleared by the HCD, processing of the control list does not occur after the next SOF. The Host
Controller must check this bit whenever it wants to process the list. When disabled, the HCD
may modify the list. If HcControlCurrentED is pointing to an ED to be removed, the HCD must
advance the pointer by updating HcControlCurrentED before re-enabling processing of the list.
3IE
Isochronous Enable: This bit is used by the HCD to enable or disable processing of
isochronous EDs. While processing the periodic list in a frame, the Host Controller checks the
status of this bit when it nds an isochronous ED (that is, the Format bit of ED is logic 1; for
details, refer to
Open Host Controller Interface Specication for USB Rev. 1.0a). If set (enabled),
the Host Controller continues processing the EDs. If cleared (disabled), the Host Controller halts
processing of the periodic list, which now contains only isochronous EDs, and begins
processing the bulk or control lists. Setting this bit is guaranteed to take effect in the next frame
and not the current frame.
2
PLE
Periodic List Enable: This bit is set to enable the processing of the periodic list in the next
frame. If cleared by the HCD, processing of the periodic list does not occur after the next SOF.
The Host Controller must check this bit before it starts processing the list.
Table 46.
HcControl - Host Controller Control register bit description …continued
Address: Content of the base address register + 04h
Bit
Symbol
Description
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1563BM,518 | 功能描述:USB 接口集成電路 USB 2.0 4PORT PCI RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1563BM,551 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -T OR NO "-" RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1563BM,557 | 功能描述:USB 接口集成電路 USB 2.0 4PORT PCI HOST CONTROL RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1563BM518 | 制造商:ST-Ericsson 功能描述:CONTROLLER USB PCI HOST 128LQFP |
| ISP1563BMGA | 功能描述:IC USB HOST CTRL HI-SPD 128LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應商設備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
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