參數(shù)資料
型號(hào): ISP1563BM
廠商: ST-ERICSSON
元件分類(lèi): 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-420-1, LQFP-100
文件頁(yè)數(shù): 59/102頁(yè)
文件大?。?/td> 466K
代理商: ISP1563BM
ISP1563_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 15 March 2007
6 of 102
NXP Semiconductors
ISP1563
HS USB PCI Host Controller
AUX1V8
11
-
1.8 V auxiliary output voltage; only for voltage conditioning; cannot be
used to supply power to external components; connected to 100 nF
and 20
F capacitors
VI(VAUX3V3)
12
-
3.3 V auxiliary input supply voltage; add a 100 nF decoupling
capacitor
SMI#
13
O
System Management Interrupt; when not in use, pull-up to 3.3 V
through a 10 k
resistor
3.3 V output pad; 3 ns slew rate control; CMOS; open-drain
INTA#
14
O
PCI interrupt
PCI pad; 3.3 V signaling; open-drain
RST#
15
I
PCI reset; used to bring PCI-specic registers, sequencers and
signals to a consistent state
3.3 V input pad; push-pull; CMOS
GNDD
16
-
digital ground
PCICLK
17
I
PCI system clock; see Table 128
PCI pad; 3.3 V signaling
GNT#
18
I/O
PCI grant; indicates to the agent that access to the bus is granted
PCI pad; 3.3 V signaling
REQ#
19
I/O
PCI request; indicates to the arbitrator that the agent wants to use the
bus
PCI pad; 3.3 V signaling
AD[31]
20
I/O
bit 31 of multiplexed PCI address and data
PCI pad; 3.3 V signaling
VCC(I/O)
21
-
3.3 V supply voltage; used to power pads; add a 100 nF decoupling
capacitor
AD[30]
22
I/O
bit 30 of multiplexed PCI address and data
PCI pad; 3.3 V signaling
AD[29]
23
I/O
bit 29 of multiplexed PCI address and data
PCI pad; 3.3 V signaling
AD[28]
24
I/O
bit 28 of multiplexed PCI address and data
PCI pad; 3.3 V signaling
AD[27]
25
I/O
bit 27 of multiplexed PCI address and data
PCI pad; 3.3 V signaling
VI(VREG3V3)
26
-
3.3 V regulator input supply voltage; add a 100 nF decoupling
capacitor
GNDA
27
-
analog ground
REG1V8
28
-
1.8 V regulator output voltage; only for voltage conditioning; cannot
be used to supply power to external components; connected to a
100 nF capacitor and a 4.7
F-to-10 F capacitor
GNDD
29
-
digital ground
AD[26]
30
I/O
bit 26 of multiplexed PCI address and data
PCI pad; 3.3 V signaling
AD[25]
31
I/O
bit 25 of multiplexed PCI address and data
PCI pad; 3.3 V signaling
Table 2.
Pin description …continued
Symbol[1]
Pin
Type
Description
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