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參數(shù)資料
| 型號： | ISPLSI 2064E-200LT100 |
| 廠商： | Lattice Semiconductor Corporation |
| 文件頁數(shù)： | 6/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PLD ISP 64I/O 4.5NS 100TQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | ispLSI® 2000E |
| 可編程類型： | 系統(tǒng)內(nèi)可編程 |
| 最大延遲時(shí)間 tpd(1)： | 4.5ns |
| 電壓電源 - 內(nèi)部： | 4.75 V ~ 5.25 V |
| 邏輯元件/邏輯塊數(shù)目： | 16 |
| 宏單元數(shù)： | 64 |
| 門數(shù)： | 2000 |
| 輸入/輸出數(shù)： | 64 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP（14x14） |
| 包裝： | 托盤 |
| 其它名稱： | ISPLSI2064E-200LT100 |
4
Specifications ispLSI 2064E
Output Load Conditions (see Figure 2)
Figure 2. Test Load
+ 5V
R1
R2
CL*
Device
Output
Test
Point
*CL includes Test Fixture and Probe Capacitance.
DC Electrical Characteristics
Over Recommended Operating Conditions
Input Pulse Levels
Table 2-0003/2064E
Input Rise and Fall Time 10% to 90%
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
GND to 3.0V
1.5V
See Figure 2
3-state levels are measured 0.5V from
steady-state active level.
1.5 ns
TEST CONDITION
R1
R2
CL
A
470
390
35pF
B
∞
390
35pF
470
390
35pF
Active High
Active Low
C
470
390
5pF
∞
390
5pF
Active Low to Z
at V +0.5V
OL
Active High to Z
at V
-0.5V
OH
Table 2-0004/2064
Switching Test Conditions
VOL
SYMBOL
1. One output at a time for a maximum duration of one second. VOUT = 0.5V was selected to avoid test
problems by tester ground degradation. Characterized but not 100% tested.
2. Measured using four 16-bit counters.
3. Typical values are at VCC = 5V and TA = 25°C.
4. Unused inputs held at 0.0V.
5. Maximum ICC varies widely with specific device configuration and operating frequency. Refer to the
Power Consumption section of this data sheet and the Thermal Management section of the Lattice Semiconductor
Data Book or CD-ROM to estimate maximum ICC.
Table 2-0007/2064E
VOH
IIH
IIL
PARAMETER
IIL-PU
IOS1
ICC2,4,5
Output Low Voltage
Output High Voltage
Input or I/O Low Leakage Current
Operating Power Supply Current
IOL = 8 mA
IOH = -4 mA
0V ≤ VIN ≤ VIL (Max.)
VIL = 0.0V, VIH = 3.0V
CONDITION
MIN.
TYP.
3
MAX. UNITS
–
2.4
–
0.4
–
10
-10
10
V
A
Input or I/O High Leakage Current
VCCIO ≤ VIN ≤ 5.25V
(VCCIO - 0.2)V ≤ VIN ≤ VCCIO
A
I/O Active Pull-Up Current
0V ≤ VIN ≤ 2.0V
-10
–
-250
A
Output Short Circuit Current
VCCIO = 5.0V or 3.3V, VOUT = 0.5V
–
-240
mA
–
100
mA
–
fTOGGLE = 1 MHz
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| ISPLSI2064E-200LT100 | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ISPLSI2064V | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V High Density Programmable Logic |
| ISPLSI2064V-100LJ44 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V High Density Programmable Logic |
| ISPLSI2064V-100LJ44I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V High Density Programmable Logic |
| ISPLSI2064V-100LJ84 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V High Density Programmable Logic |
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