參數(shù)資料
型號(hào)： K4T1G084QQ-HC(L)F7
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 1Gb Q-die DDR2 SDRAM Specification
中文描述： 1Gb的調(diào)Q DDR2內(nèi)存芯片規(guī)格
文件頁(yè)數(shù)： 42/44頁(yè)
文件大小： 891K
代理商： K4T1G084QQ-HC(L)F7
K4T1G084QQ
K4T1G164QQ
Rev. 1.01 November 2007
DDR2 SDRAM
42 of 44
K4T1G044QQ
Definitions :
- tCK(avg)
tCK(avg) is calculated as the average clock period across any consecutive 200 cycle window.
- tCH(avg) and tCL(avg)
tCH(avg) is defined as the average HIGH pulse width, as calculated across any consecutive 200 HIGH pulses.
tCL(avg) is defined as the average LOW pulse width, as calculated across any consecutive 200 LOW pulses.
- tJIT(duty)
tJIT(duty) is defined as the cumulative set of tCH jitter and tCL jitter. tCH jitter is the largest deviation of any single tCH from tCH(avg). tCL jitter is the larg-
est deviation of any single tCL from tCL(avg).
tJIT(duty) = Min/max of {tJIT(CH), tJIT(CL)}
where,
tJIT(CH) = {tCHi- tCH(avg) where i=1 to 200}
tJIT(CL) = {tCLi- tCL(avg) where i=1 to 200}
- tJIT(per), tJIT(per,lck)
tJIT(per) is defined as the largest deviation of any single tCK from tCK(avg).
tJIT(per) = Min/max of {tCKi- tCK(avg) where i=1 to 200}
tJIT(per) defines the single period jitter when the DLL is already locked.
tJIT(per,lck) uses the same definition for single period jitter, during the DLL locking period only.
tJIT(per) and tJIT(per,lck) are not guaranteed through final production testing.
- tJIT(cc), tJIT(cc,lck)
tJIT(cc) is defined as the difference in clock period between two consecutive clock cycles : tJIT(cc) = Max of |tCK
i+1
- tCKi|
tJIT(cc) defines the cycle to cycle jitter when the DLL is already locked.
tJIT(cc,lck) uses the same definition for cycle to cycle jitter, during the DLL locking period only.
tJIT(cc) and tJIT(cc,lck) are not guaranteed through final production testing.
- tERR(2per), tERR (3per), tERR (4per), tERR (5per), tERR (6-10per) and tERR (11-50per)
tERR is defined as the cumulative error across multiple consecutive cycles from tCK(avg).
tERR(nper) =
where
n
= 2
n
= 3
n
= 4
n
= 5
6
≤
n
≤
10
11
≤
n
≤
50
i + n - 1
∑
tCK
j
j
= 1
- n x tCK(avg)
for
for
for
for
for
for
tERR(2per)
tERR(3per)
tERR(4per)
tERR(5per)
tERR(6-10per)
tERR(11-50per)
tCK(avg) =
where
N
= 200
N
∑
tCK
j
j
= 1
/N
tCH(avg) =
where
N
= 200
N
∑
tCH
j
j
= 1
/(N x tCK(avg))
tCL(avg) =
where
N
= 200
N
∑
tCL
j
j
= 1
/(N x tCK(avg))
相關(guān)PDF資料
PDF描述
K4T1G044QQ 1Gb Q-die DDR2 SDRAM Specification
K4T1G044QQ-HC(L)E6 1Gb Q-die DDR2 SDRAM Specification
K4T1G044QQ-HC(L)E7 1Gb Q-die DDR2 SDRAM Specification
K4T1G044QQ-HC(L)F7 1Gb Q-die DDR2 SDRAM Specification
K4T1G084QQ 1Gb Q-die DDR2 SDRAM Specification
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