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參數(shù)資料
| 型號： | K7I161882B-FC30 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Kx36-bit, 1Mx18-bit DDRII CIO b2 SRAM |
| 中文描述： | 512Kx36位，1Mx18位首席信息官b2條DDRII的SRAM |
| 文件頁數(shù)： | 7/17頁 |
| 文件大小： | 378K |
| 代理商： | K7I161882B-FC30 |
512Kx36 & 1Mx18 DDRII CIO b2 SRAM
- 7 -
Rev 3.1
July. 2004
K7I163682B
K7I161882B
STATE DIAGRAM
Notes
: 1. Internal burst counter is fixed as 2-bit linear, i.e. when first address is A0+0, next internal burst address is A0+1.
2. "LOAD" refers to read new address active status with LD=Low, "LOAD" refers to read new address inactive status with LD=High.
3. "READ" refers to read active read status with R/W=High, "WRITE" refers to write active status with R/W=Low
LOAD
LOAD
LOAD
LOAD
POWER-UP
NOP
LOAD NEW ADDRESS
DDR READ
DDR WRITE
LOAD
LOAD
READ
WRITE
LINEAR BURST SEQUENCE TABLE
BURST SEQUENCE
Case 1
SA
0
0
1
Case 2
SA
0
1
0
First Address
Second Address
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PDF描述 |
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| K7I163682B | 512Kx36-bit, 1Mx18-bit DDRII CIO b2 SRAM |
| K7I163682B-FC16 | 512Kx36-bit, 1Mx18-bit DDRII CIO b2 SRAM |
| K7I163682B-FC20 | GT 35C 35#16 PIN PLUG RTANG |
| K7I163682B-FC25 | 512Kx36-bit, 1Mx18-bit DDRII CIO b2 SRAM |
| K7I163682B-FC30 | 512Kx36-bit, 1Mx18-bit DDRII CIO b2 SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K7I161884B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 DDRII CIO b4 SRAM |
| K7I161884B-FC25T00 | 制造商:Samsung Semiconductor 功能描述:16MSYNC DDRII, COMMON I/O SRAM 1MX18FBGA, T/R - Tape and Reel |
| K7I163682B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36-bit, 1Mx18-bit DDRII CIO b2 SRAM |
| K7I163682B_06 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36 & 1Mx18 DDRII CIO b2 SRAM |
| K7I163682B-FC16 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36-bit, 1Mx18-bit DDRII CIO b2 SRAM |
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