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參數(shù)資料
| 型號： | K7N403609B-QI22 |
| 元件分類： | SRAM |
| 英文描述： | 128K X 36 ZBT SRAM, 2.6 ns, PQFP100 |
| 封裝： | 20 X 14 MM, TQFP-100 |
| 文件頁數(shù)： | 2/18頁 |
| 文件大?。?/td> | 398K |
| 代理商： | K7N403609B-QI22 |
K7N403609B
128Kx36/x32 & 256Kx18 Pipelined NtRAMTM
- 10 -
Rev 1.0
November 2001
K7N401809B
K7N403209B
DC ELECTRICAL CHARACTERISTICS(VDD=3.3V+0.165V/-0.165V, TA=0
°C to +70°C)
Notes : 1.The above parameters are also guaranteed at industrial temperature range.
2. Reference AC Operating Conditions and Characteristics for input and timing.
3. Data states are all zero.
4. In Case of I/O Pins, the Max. VIH=VDDQ+0.3V
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
UNIT
NOTES
Input Leakage Current(except ZZ)
IIL
VDD=Max ; VIN=VSS to VDD
-2
+2
A
Output Leakage Current
IOL
Output Disabled,
-2
+2
A
Operating Current
Standby Current
ICC
VDD=Max IOUT=0mA
Cycle Time
≥ tCYC Min
-25
-
400
mA
1,2
-22
-
360
-20
-
330
ISB
Device deselected, IOUT=0mA,
ZZ
≤VIL, f=Max,
All Inputs
≤0.2V or ≥ VDD-0.2V
-25
-
160
mA
-22
-
155
-20
-
150
ISB1
Device deselected, IOUT=0mA, ZZ
≤0.2V, f=0,
All Inputs=fixed (VDD-0.2V or 0.2V)
-
80
mA
ISB2
Device deselected, IOUT=0mA, ZZ
≥VDD-0.2V,
f=Max, All Inputs
≤VIL or ≥VIH
-
50
mA
Output Low Voltage(3.3V I/O)
VOL
IOL=8.0mA
-
0.4
V
Output High Voltage(3.3V I/O)
VOH
IOH=-4.0mA
2.4
-
V
Output Low Voltage(2.5V I/O)
VOL
IOL=1.0mA
-
0.4
V
Output High Voltage(2.5V I/O)
VOH
IOH=-1.0mA
2.0
-
V
Input Low Voltage(3.3V I/O)
VIL
-0.3*
0.8
V
Input High Voltage(3.3V I/O)
VIH
2.0
VDD+0.3**
V
3
Input Low Voltage(2.5V I/O)
VIL
-0.3*
0.7
V
Input High Voltage(2.5V I/O)
VIH
1.7
VDD+0.3**
V
3
VSS
VIH
VSS-1.0V
20% tCYC(MIN)
(VDD=3.3V+0.165V/-0.165V,VDDQ=3.3V+0.165/-0.165V or VDD=3.3V+0.165V/-0.165V,VDDQ=2.5V+0.4V/-0.125V, TA=0to70
°C)
TEST CONDITIONS
* The above parameters are also guaranteed at industrial temperature range.
PARAMETER
VALUE
Input Pulse Level(for 3.3V I/O)
0 to 3.0V
Input Pulse Level(for 2.5V I/O)
0 to 2.5V
Input Rise and Fall Time(Measured at 20% to 80% for 3.3V I/O)
1.0V/ns
Input Rise and Fall Time(Measured at 20% to 80% for 2.5V I/O)
1.0V/ns
Input and Output Timing Reference Levels for 3.3V I/O
1.5V
Input and Output Timing Reference Levels for 2.5V I/O
VDDQ/2
Output Load
See Fig. 1
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