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參數(shù)資料
| 型號： | K7N403609B-QI22 |
| 元件分類： | SRAM |
| 英文描述： | 128K X 36 ZBT SRAM, 2.6 ns, PQFP100 |
| 封裝： | 20 X 14 MM, TQFP-100 |
| 文件頁數(shù)： | 4/18頁 |
| 文件大?。?/td> | 398K |
| 代理商： | K7N403609B-QI22 |
K7N403609B
128Kx36/x32 & 256Kx18 Pipelined NtRAMTM
- 12 -
Rev 1.0
November 2001
K7N401809B
K7N403209B
SLEEP MODE
SLEEP MODE is a low current, power-down mode in which the device is deselected and current is reduced to ISB2. The duration of
SLEEP MODE is dictated by the length of time the ZZ is in a High state.
After entering SLEEP MODE, all inputs except ZZ become disabled and all outputs go to High-Z
The ZZ pin is an asynchronous, active high input that causes the device to enter SLEEP MODE.
When the ZZ pin becomes a logic High, ISB2 is guaranteed after the time tZZI is met. Any operation pending when entering SLEEP
MODE is not guaranteed to successful complete. Therefore, SLEEP MODE (READ or WRITE) must not be initiated until valid pend-
ing operations are completed. similarly, when exiting SLEEP MODE during tPUS, only a DESELECT or READ cycle should be given
while the SRAM is transitioning out of SLEEP MODE.
SLEEP MODE ELECTRICAL CHARACTERISTICS
DESCRIPTION
CONDITIONS
SYMBOL
MIN
MAX
UNITS
Current during SLEEP MODE
ZZ
≥ VIH
ISB2
10
mA
ZZ active to input ignored
tPDS
2
cycle
ZZ inactive to input sampled
tPUS
2
cycle
ZZ active to SLEEP current
tZZI
2
cycle
ZZ inactive to exit SLEEP current
tRZZI
0
K
tPDS
ZZ setup cycle
tRZZI
ZZ
Isupply
All inputs
(except ZZ)
Outputs
(Q)
tZZI
tPUS
ZZ recovery cycle
Deselect or Read Only
High-Z
DON
′T CARE
ISB2
SLEEP MODE WAVEFORM
Normal
operation
cycle
Deselect or Read Only
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