參數(shù)資料
型號: K9S1208V0M-SSB0
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 64M x 8 Bit SmartMedia Card
中文描述: 6400 × 8位SmartMedia卡
文件頁數(shù): 6/33頁
文件大?。?/td> 491K
代理商: K9S1208V0M-SSB0
K9S1208V0M-SSB0
SmartMedia
TM
6
PIN DESCRIPTION
Command Latch Enable(CLE)
The CLE input controls the path activation for commands sent to the command register. When active high, commands are latched
into the command register through the I/O ports on the rising edge of the WE signal.
Address Latch Enable(ALE)
The ALE input controls the activating path for address to the internal address registers. Addresses are latched on the rising edge of
WE with ALE high.
Chip Enable(CE)
The CE input is the device selection control. When CE goes high during a read operation the device is returned to standby mode.
However, when the device is in the busy state during program or erase, CE high is ignored, and does not return the device to
standby mode.
Write Enable(WE)
The WE input controls writes to the I/O port. Commands, address and data are latched on the rising edge of the WE pulse.
The WE must be held high when outputs are activated.
Read Enable(RE)
The RE input is the serial data-out control, and when active drives the data onto the I/O bus. Data is valid t
REA
after the falling edge
of RE which also increments the internal column address counter by one.
I/O Port : I/O 0 ~ I/O 7
The I/O pins are used to input command, address and data, and to output data during read operations. The I/O pins float to high-z
when the chip is deselected or when the outputs are disabled.
Write Protect(WP)
The WP pin provides inadvertent write/erase protection during power transitions. The internal high voltage generator is reset when
the WP pin is active low.
Ready/Busy(R/B)
The R/B output indicates the status of the device operation. When low, it indicates that a program, erase or random read operation is
in process and returns to high state upon completion. It is an open drain output and does not float to high-z condition when the chip
is deselected or when outputs are disabled.
Low Voltage Detect(LVD)
The LVD is used to electrically detect the proper supply voltage. By connecting this pin to Vss through a pull-down resister, it is pos-
sible to distinguish 3.3V product from 5V product. When 3.3V is applied as Vcc to pins 12 and 22, a ’High’ level can be detected on
the system side if the device is a 3.3V product, and ’Low’ level for 5V product.
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