參數(shù)資料
型號: KAD5610P-25Q72
廠商: Intersil
文件頁數(shù): 19/30頁
文件大?。?/td> 0K
描述: IC ADC 10BIT 250MSPS DUAL 72-QFN
產(chǎn)品培訓(xùn)模塊: High-Speed Analog-to-Digital Converters
標(biāo)準(zhǔn)包裝: 1
系列: FemtoCharge™
位數(shù): 10
采樣率(每秒): 250M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 438mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 72-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 72-QFN(10x10)
包裝: 托盤
輸入數(shù)目和類型: 2 個差分,單極
26
FN6810.2
September 10, 2009
Device
T
est
C0
test_io
User Test Mode
[1:0]
00 = Single
01 = Alternate
10 = Reserved
11 = Reserved
Output Test Mode [3:0]
00h
G
0 = Off
1 = Midscale
Short
2 = +FS Short
3 = -FS Short
4 = Checker
Board
5 = Reserved
6 = Reserved
7 = One/Zero
Word Toggle
8 = User Input
9-15 = Reserved
C1
Reserved
00h
G
C2
user_patt 1_lsb
B7
B6
B5
B4
B3
B2
B1
B0
00h
G
C3
user_patt1_msb
B15
B14
B13
B12
B11
B10
B9
B8
00h
G
C4
user_patt 2_lsb
B7
B6
B5
B4
B3
B2
B1
B0
00h
G
C5
user_patt2_msb
B15
B14
B13
B12
B11
B10
B9
B8
00h
G
C6-FF
Reserved
Equivalent Circuits
FIGURE 42. ANALOG INPUTS
FIGURE 43. CLOCK INPUTS
FIGURE 44. TRI-LEVEL DIGITAL INPUTS
FIGURE 45. DIGITAL INPUTS
TABLE 17. SPI MEMORY MAP (Continued)
ADDR
(Hex)
PARAMETER
NAME
BIT 7
(MSB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
(LSB)
DEF. VALUE
(Hex)
INDEXED/
GLOBAL
AVDD
INP
INN
AVDD
F1
F2
F 3
F2
F 3
CSAMP
1.6pF
CSAMP
1.6pF
TO
CHARGE
PIPELINE
TO
CHARGE
PIPELINE
1000O
Ω
Φ
AVDD
CLKP
CLKN
AVDD
TO
CLOCK-
PHASE
GENERATION
11kO
AVDD
18kO
Ω
AVDD
INPUT
AVDD
TO
SENSE
LOGIC
75kO
280O
Ω
INPUT
OVDD
280
Ω
TO
LOGIC
20k
OVDD
(20k PULL-UP
ON RESETN
ONLY)
Ω
KAD5610P
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