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參數(shù)資料
| 型號(hào)： | KIT33689DWBEVB |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 13/31頁(yè) |
| 文件大小： | 0K |
| 描述： | KIT FOR 33689 SBC WITH LIN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | LIN 接口 |
| 已用 IC / 零件： | MC33689 |
| 相關(guān)產(chǎn)品： | MC33689DDWBR2CT-ND - IC SYSTEM BASE W/LIN 32-SOIC MC33689DWBR2-ND - IC SYSTEM BASE W/LIN 32-SOIC MC33689DWB-ND - IC SYSTEM BASE W/LIN 32-SOIC MC33689DDWBR2TR-ND - IC SYSTEM BASE W/LIN 32-SOIC MC33689DDWB-ND - IC SYSTEM BASE W/LIN 32-SOIC |
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Analog Integrated Circuit Device Data
20
Freescale Semiconductor
33689
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
RESET OUTPUT PIN (RST)
The RST pin is the 5.0 V regulator and Watchdog reset
output pin.
PWM INPUT CONTROL PIN (IN)
The IN pin is the external PWM control pin for the HS1 and
HS2 high-side switches.
SERIAL DATA CLOCK PIN (SCLK)
The SCLK pin is the SPI clock input pin. MISO data
changes on the negative transition of the SCLK. MOSI is
sampled on the positive edge of the SCLK.
MASTER OUT SLAVE IN PIN (MOSI)
The MOSI pin receives SPI data from the MCU. This data
input is sampled on the positive edge of SCLK.
MASTER IN SLAVE OUT PIN (MISO)
The MISO pin sends data to an SPI-enabled MCU. Data
on this output pin changes on the negative edge of the SCLK.
When CS is HIGH, this pin enters the high-impedance state.
CHIP SELECT PIN (CS)
The CS pin is the chip select input pin for SPI use. When
this signal is high, SPI signals are ignored. Asserting this pin
LOW starts an SPI transaction. The transaction is completed
when this signal returns HIGH.
INTERRUPT OUTPUT PIN (INT)
The INT pin is used to report 33689 faults to the MCU.
Interrupt pulses are generated for:
Voltage regulator temperature pre-warning
HS1, HS2, or HS3 thermal shutdown
VS1 or VS2 overvoltage (20 V typical)
VS1 or VS2 undervoltage (6.0 V typical)
If an interrupt is generated, then when the next SPI read
operation is performed bit D7 in the SPI Register will be set
to logic [1] and bits D6:D0 will report the interrupt source.
In cases of wake-up from the Stop mode, INT is set LOW
in order to signal to the MCU that a wake-up event from the
L1, L2, or LIN bus pin has occurred.
RECEIVER OUTPUT PIN (RXD)
The RXD pin is the receiver output of the LIN interface and
reports the state of the bus voltage (RXD LOW when LIN bus
is dominant, RXD HIGH when LIN bus is recessive).
TRANSMITTER INPUT PIN (TXD)
The TXD pin is the transmitter input of the LIN interface
and controls the state of the bus output (dominant when TXD
is LOW, recessive when TXD is HIGH).
GROUND PINS (GND, TGND, AND AGND)
The 33689 has three different types of ground pins.
The GND pin is the electrical ground pin for the device.
The AGND is the analog ground pin for the voltage
regulator and current sense operational amplifier.
The four TGND pins are the thermal ground pins for the
device.
Important The GND, the AGND, and the four TGND pins
must be connected together to a ground external to the
33689.
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