參數(shù)資料
型號(hào)： KIT33689DWBEVB
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 17/31頁(yè)
文件大?。?/td> 0K
描述： KIT FOR 33689 SBC WITH LIN
標(biāo)準(zhǔn)包裝： 1
主要目的： LIN 接口
已用 IC / 零件： MC33689
相關(guān)產(chǎn)品： MC33689DDWBR2CT-ND - IC SYSTEM BASE W/LIN 32-SOIC
MC33689DWBR2-ND - IC SYSTEM BASE W/LIN 32-SOIC
MC33689DWB-ND - IC SYSTEM BASE W/LIN 32-SOIC
MC33689DDWBR2TR-ND - IC SYSTEM BASE W/LIN 32-SOIC
MC33689DDWB-ND - IC SYSTEM BASE W/LIN 32-SOIC
Analog Integrated Circuit Device Data
24
Freescale Semiconductor
33689
FUNCTIONAL DESCRIPTION
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
SPI INTERFACE AND REGISTER DESCRIPTION
As shown in Figure 2, the SPI is an 8-bit SPI. All data is
sent as bytes. The MSB, D7, is sent first. The minimum time
between two rising edges on the CS pin is 15
μs.
During an SPI data communication, the state of MISO
reports the state of the 33689 at time of a CS HIGH-to-LOW
transition. The status flags are latched at a CS HIGH-to-LOW
transition.
Figure 2. Data Format Description
The following tables describe the SPI Register bits,
showing reset values and reset conditions.
SPI Register: Write Control Bits
LINSL2 and LINSL1—LIN Baud Rate and Low-Power
Mode Pre-Selection Bits
These bits select the LIN slew rate and requested low-
power mode in accordance with Table 3. Reset clears the
LINSL2:1 bits.
MOSI
MISO
Bit0
Bit1
Bit2
Bit3
Bit4
Bit5
Bit6
Bit7
D0
D1
D2
D3
D4
D5
D6
D7
Table 2. SPI Register Overview
Read/Write
Information
MSB
Bits
LSB
D7
D6
D5
D4
D3
D2
D1
D0
Write
LINSL2
LINSL1
LIN-PU
HS3
HS2
HS1
MODE2
MODE1
Read
INTSRC (1)
LINWU or
LINFAIL
VSOV
VSUV or
VDDT
HSST
L2
L1
Write Reset
Value
00
0
—
Write Reset
Condition
POR,
RESET
POR,
RESET
POR
POR,
RESET
POR,
RESET
POR,
RESET
——
Notes
1.
D7 signals interrupt source. After interrupt occurs, if D7 is a logic [1] D6:D0 indicate the interrupt source. If D7 is a logic [0] no interrupt
has occurred and D6:D0 report real-time status.
2.
The first SPI read after a 33689 reset returns the BATFAIL status flag bit D4.
Table 3. LIN Slew Rate Control and Device Low Power
Mode Pre-Selection Bits (D7 and D6)
LINSL2
LINSL1
Description
0
LIN slew rate normal
(baud rate up to 20 kbps)
0
1
LIN slew rate slow
(baud rate up to 10 kbps)
1
0
LIN slew rate fast (for program download,
baud rate up to 100 kbps)
1
Low power mode (Sleep or Stop mode)
request, no change in LIN slew rate
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