參數(shù)資料
型號(hào)： KIT33689DWBEVB
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 29/31頁(yè)
文件大小： 0K
描述： KIT FOR 33689 SBC WITH LIN
標(biāo)準(zhǔn)包裝： 1
主要目的： LIN 接口
已用 IC / 零件： MC33689
相關(guān)產(chǎn)品： MC33689DDWBR2CT-ND - IC SYSTEM BASE W/LIN 32-SOIC
MC33689DWBR2-ND - IC SYSTEM BASE W/LIN 32-SOIC
MC33689DWB-ND - IC SYSTEM BASE W/LIN 32-SOIC
MC33689DDWBR2TR-ND - IC SYSTEM BASE W/LIN 32-SOIC
MC33689DDWB-ND - IC SYSTEM BASE W/LIN 32-SOIC
Analog Integrated Circuit Device Data
Freescale Semiconductor
7
33689
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditions 5.5 V
≤ V
SUP ≤ 18 V, - 40°C ≤ T
A ≤ 125°C, GND = 0.0 V unless otherwise noted.
Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
VS1 AND VS2 INPUT PINS (DEVICE POWER SUPPLY)
Supply Input Voltage
Nominal DC
Load Dump
Jump Start (3)
VSUP
VSUPLD
VSUPJS
5.5
—
18
40
27
V
Supply Input Current (4)
Normal Mode, IOUT at VDD = 10 mA, LIN Recessive State
Sleep Mode, VDD OFF, VSUP ≤ 13.5 V
Stop Mode, VDD ON with IOUT < 100 μA, VSUP ≤ 13.5 V
ISUP(NORM)
ISLEEP
ISTOP
—
5.0
35
60
8.0
45
75
mA
μA
Input Threshold Voltage (Normal Mode, Interrupt Generated)
Fall Early Warning, Bit VSUV Set
Overvoltage Warning, Bit VSOV Set
VSUVEW
VSOVW
5.7
18
6.1
19.75
6.6
20.5
V
Hysteresis (5)
VSUV Flag
VSOV Flag
VHYS
—
1.0
220
—
V
mV
VDD OUTPUT PIN (EXTERNAL 5.0 V OUTPUT FOR MCU USE) (6)
Output Voltage
IDD from 2.0 mA to 50 mA, 5.5 V < VSUP < 27 V
VDDOUT
4.75
5.0
5.25
V
Dropout Voltage (7)
IDD = 50 mA
VDDDROP
—
0.1
0.2
V
Output Current Limitation (8)
IDD
50
120
200
mA
Overtemperature Pre-warning (Junction)
Normal Mode, Interrupt Generated, Bit VDDT Set
TPRE
120
135
160
°C
Thermal Shutdown (Junction)
Normal Mode
TSD
165
170
—
°C
Notes
3.
Device is fully functional. All features are operating. An overtemperature fault may occur.
4.
Total current (IVS1 + IVS2) at VS1 and VS2 pins is measured at the ground pins.
5.
Parameter guaranteed by design; however, it is not production tested.
6.
Specification with external capacitor 2.0
μF < C < 10 μF and 200 mΩ ≤ ESR ≤ 10 Ω. Normal mode. Low ESR electrolytic capacitor values
up to 47
μF can be used.
7.
Measured when the voltage has dropped 100 mV below its nominal value.
8.
Internally limited. Total 5.0 V regulator current. A 5.0 mA current for the Current Sense Operational Amplifier operation is included.
Digital outputs are supplied from VDD.
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