- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373166 > KMM5361203C2WG (SAMSUNG SEMICONDUCTOR CO. LTD.) 1M x 36 DRAM SIMM using 1Mx16 and 1Mx4 Quad CAS, 1K Refresh PDF資料下載
參數(shù)資料
| 型號(hào)： | KMM5361203C2WG |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 1M x 36 DRAM SIMM using 1Mx16 and 1Mx4 Quad CAS, 1K Refresh |
| 中文描述： | 100萬× 36的DRAM使用1Mx16上海藥物研究所和中國(guó)科學(xué)院1Mx4四，每1000刷新 |
| 文件頁數(shù)： | 7/17頁 |
| 文件大小： | 280K |
| 代理商： | KMM5361203C2WG |
DRAM MODULE
KMM5361203C2W/C2WG
Rev. 0.0 (Nov. 1997)
- 7 -
NOTES
An initial pause of 200us is required after power-up followed
by any 8 RAS-only or CAS-before-RAS refresh cycles before
proper device operation is achieved.
V
IH
(min) and V
IL
(max) are reference levels for measuring
timing of input signals. Transition times are measured
between V
IH
(min) and V
IL
(max) and are assumed to be 5ns
for all inputs.
Measured with a load equivalent to 2 TTL loads and 100pF.
Operation within the
t
RCD
(max) limit insures that
t
RAC
(max)
can be met.
t
RCD
(max) is specified as a reference point only.
If
t
RCD
is greater than the specified
t
RCD
(max) limit, then
access time is controlled exclusively by
t
CAC
.
Assumes that
t
RCD
≥
t
RCD
(max).
This parameter defines the time at which the output achieves
the open circuit condition and is not referenced to V
OH
or
V
OL
.
t
WCS
is non-restrictive operating parameter. It is included in
the data sheet as electrical characteristic s only. If
t
WCS
≥
t
WCS
(min), the cycle is an early write cycle and the
data out pin will remain high impedance for the duration of
the cycle.
Either
t
RCH
or
t
RRH
must be satisfied for a read cycle.
These parameter are referenced to the CAS leading edge in
early write cycles.
Operation within the
t
RAD
(max) limit insures that
t
RAC
(max)
can be met.
t
RAD
(max) is specified as reference point only. If
t
RAD
is greater than the specified
t
RAD
(max) limit, then
access time is controlled by
t
AA
.
In order to hold the address latched by the first CAS going
low, the parameter
t
CLCH
must be met.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
Test condition : V
ih
/V
il
=2.4/0.8V, V
oh
/V
ol
=2.4/0.4V, Output loading CL=100pF
Parameter
Symbol
-5
-6
Unit
Note
Min
35
10
50
10
10
20
Max
Min
40
10
60
10
10
5
Max
Fast page mode cycle time
CAS precharge time(Fast page cycle)
RAS pulse width(Fast page cycle)
W to RAS precharge time(C-B-R refresh)
W to RAS hold time(C-B-R refresh)
Hold time CAS low to CAS
t
PC
t
CP
t
RASP
t
WRP
t
WRH
t
CLCH
ns
ns
ns
ns
ns
ns
200K
200K
11
AC CHARACTERISTICS
(0
°
C
≤
T
A
≤
70
°
C, V
CC
=5.0V
±
10%. See notes 1,2.)
11.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KMM5361205C2W | 1M x 36 DRAM SIMM using 1Mx16 and 4M Quad CAS EDO, 1K Refresh |
| KMM5361205C2WG | 1M x 36 DRAM SIMM using 1Mx16 and 4M Quad CAS EDO, 1K Refresh |
| KMM53632000BK | 32M x 36 DRAM SIMM Using 16Mx4 & 16Mx1, 4K Refresh, 5V |
| KMM53632000CK | 32M x 36 DRAM SIMM Using 16Mx4 & 16Mx1, 4K Refresh, 5V |
| KMM53632000BKG | 32M x 36 DRAM SIMM Using 16Mx4 & 16Mx1, 4K Refresh, 5V |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KMM5361205C2W | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 36 DRAM SIMM using 1Mx16 and 4M Quad CAS EDO, 1K Refresh |
| KMM5361205C2WG | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 36 DRAM SIMM using 1Mx16 and 4M Quad CAS EDO, 1K Refresh |
| KMM53616000BK | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 36 DRAM SIMM Using 16Mx4 & 16Mx1, 4K Refresh, 5V |
| KMM53616000BKG | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 36 DRAM SIMM Using 16Mx4 & 16Mx1, 4K Refresh, 5V |
| KMM53616000CK | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 36 DRAM SIMM Using 16Mx4 & 16Mx1, 4K Refresh, 5V |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。