參數(shù)資料
型號(hào): KMPC8533EVTAQG
廠商: Freescale Semiconductor
文件頁數(shù): 34/112頁
文件大?。?/td> 0K
描述: IC MPU POWERQUICC III 783-PBGA
標(biāo)準(zhǔn)包裝: 5
系列: MPC8xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 1.0GHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 783-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 783-FCPBGA(29x29)
包裝: 托盤
MPC8533E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 6
28
Freescale Semiconductor
Enhanced Three-Speed Ethernet (eTSEC), MII Management
Figure 10 provides the AC test load for eTSEC.
Figure 10. eTSEC AC Test Load
Figure 11 shows the GMII receive AC timing diagram.
Figure 11. GMII Receive AC Timing Diagram
8.4
MII AC Timing Specifications
This section describes the MII transmit and receive AC timing specifications.
RX_CLK clock fall time (80%–20%)
tGRXF
——
1.0
ns
Note:
1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tGRDVKH symbolizes GMII receive
timing (GR) with respect to the time data input signals (D) reaching the valid state (V) relative to the tRX clock reference (K)
going to the high state (H) or setup time. Also, tGRDXKL symbolizes GMII receive timing (GR) with respect to the time data
input signals (D) went invalid (X) relative to the tGRX clock reference (K) going to the low (L) state or hold time. Note that, in
general, the clock reference symbol representation is based on three letters representing the clock of a particular functional.
For example, the subscript of tGRX represents the GMII (G) receive (RX) clock. For rise and fall times, the latter convention
is used with the appropriate letter: R (rise) or F (fall).
Table 26. GMII Receive AC Timing Specifications (continued)
At recommended operating conditions with L/TVDD of 3.3 V ± 5% or 2.5 V ± 5%
Parameter/Condition
Symbol1
Min
Typ
Max
Unit
Notes
Output
Z0 = 50
LVDD/2
RL = 50
RX_CLK
RXD[7:0]
tGRDXKH
tGRX
tGRXH
tGRXR
tGRXF
tGRDVKH
RX_DV
RX_ER
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