參數(shù)資料
型號(hào)： KS16114
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 9600/14400 bps FAX MODEM
中文描述： 14400分之9600基點(diǎn)傳真調(diào)制解調(diào)器
文件頁(yè)數(shù)： 19/69頁(yè)
文件大?。?/td> 513K
代理商： KS16114
KS16112/4
9600/14400 bps FAX MODEM
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19
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SOFTWARE INTERFACE
Communication between the modem and the host microprocessor is accomplished by means of a dual port
interface memory. The dual port memory consists of 32 8-bit registers that both the host microprocessor
and the modem have access to. The host can control modem operation by writing control bits or
parameter values to the dual port interface memory. The host can also monitor modem operation by reading
status bits or data values ( such as the eye quality monitor value or EQM ) from the interface memory.
The dual port read and write procedures are described in section 3.
1. Dual - Port Memory Map
The memory map for the 32 - byte interface memory registers is shown in Table 1. These registers can be
accessed during any host read or write cycle. In order to operate on a single bit or a group of bits, the
host microprocessor must first read the desired register, set or reset the desired bits and then write the
modified and unmodified bits back into the interface memory register.
2 Modem Interface Memory Bit Definitions
This section describes in detail the function of all bits, fields and registers in the interface memory. All bit,
field or register names are listed in alphanumeric order. For each bit, field or register the convention
R :B ( D ) is used to indicate the location of the term and its power up default value. R is the register
number ( hexadecimal ), B is the bit or group of bits within that register and D is the associated power up
default value. A default value of
-
indicates that the bit state depends on modem operating conditions,
thus, these bits do not truly have a power up default value.
In the transmit mode when ABORT is set the modem will finish sending the current DBFR byte after which
it will send continuous ones ( if ZCLMP is reset ) or continuous zeros ( if ZCLMP is set ). When ABORT
is reset the modem will not send continuous ones or zeros.
Address 1
ADR 1
ABORT
09 : 3 ( - )
Abort/Idle
04 : 0 - 7 ( 17h )
ADR1 is used to specify the modem
s
internal RAM address to be read or written ( data RAM if CRAM1=0
or coefficient RAM if CRAM1=1) during a RAM access cycle. The 16-bit real and imaginary data to be written
into RAM or read out of RAM is placed in XDM1, XDL1 and YDM1, YDL1. The address value in ADR1 also
determines the data to be output by the modem via the eye pattern interface ( SEPXO and SEPYO ). At
power-up, ADR1 defaults to 17h which corresponds to the rotated equalizer output ( normal eye pattern
output ).
In the receive mode when ABORT is set the modem has received a minimum of seven consecutive ones.
ABORT must then be reset by the host.
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