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參數(shù)資料
| 型號： | KS57C2504 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 元件分類： | 4位微控制器 |
| 英文描述： | 4-BIT SINGLE-CHIP MICROCONTROLLER FOR SMALL GENERAL-PURPOSE INFRARED REMOTE CONTROL TRANSMITTER |
| 中文描述： | 4位單片機(jī)的小型通用紅外遙控器 |
| 文件頁數(shù)： | 30/94頁 |
| 文件大?。?/td> | 763K |
| 代理商： | KS57C2504 |
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PRODUCT SPECIFICATION
S3C7254
4–30
EXTERNAL KEY INTERRUPT MODE REGISTER
(IMODK)
The mode register for external key interrupts at the
K0–K3 pins, IMODK, is addressable only by 4-bit
write instructions.
RESET
clears all IMODK bits to
logic zero.
Rising or falling edge can be detected by bit
IMODK.2 settings. If a rising or falling edge is
detected at any one of the selected K pin by the
IMODK register, the IRQK flag is set to logic one
and a release signal for power-down mode is
generated.
Table 14. IMODK Register Bit Settings
IMODK
0
IMODK.2
0, 1
IMODK.1
0
0
1
1
IMODK.0
0
1
0
1
Effect of IMODK Settings
Disable key interrupt
Enable edge detection at the K0–K1 pins
Enable edge detection at the K0–K2 pins
Enable edge detection at the K0–K3 pins
IMODK.2
0
1
Falling edge detection
Rising edge detection
NOTE:
1.
To generate a key interrupt, the selected pins must be configured to input mode. If any one pin of the selected pins is
configured to output mode, only falling edge can be detected.
To generate a key interrupt, first, configure pull-up resistors or external pull-down resistors. And then, select
edge detection and pins by setting IMODK register.
2.
P0.3/K3
P0.2/K2
P0.1/K1
P0.0/K0
IMODK
PIN
SELECTOR
IRQK
RISING/
FALLLING
EDGE
SELECTOR
Figure 25. Circuit Diagram for INTK
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