參數(shù)資料
型號: KSZ8051MLL TR
廠商: Micrel Inc
文件頁數(shù): 33/48頁
文件大?。?/td> 0K
描述: TXRX PHY 10/T100 3.3V MII 48LQFP
標準包裝: 1,000
類型: PHY 收發(fā)器
驅動器/接收器數(shù): 1/1
規(guī)程: MII
電源電壓: 1.8V,2.5V,3.3V
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應商設備封裝: 48-LQFP(7x7)
包裝: 帶卷 (TR)
配用: 576-3864-ND - BOARD EVALUATION FOR KSZ8051MLL
2008 Microchip Technology Inc.
DS22060B-page 41
MCP413X/415X/423X/425X
6.0
SERIAL INTERFACE (SPI)
The MCP4XXX devices support the SPI serial protocol.
This SPI operates in the slave mode (does not
generate the serial clock).
The SPI interface uses up to four pins. These are:
CS - Chip Select
SCK - Serial Clock
SDI - Serial Data In
SDO - Serial Data Out
Typical SPI Interfaces are shown in Figure 6-1. In the
SPI interface, The Master’s Output pin is connected to
the Slave’s Input pin and the Master’s Input pin is
connected to the Slave’s Output pin.
The MCP4XXX SPI’s module supports two (of the four)
standard SPI modes. These are Mode 0,0 and 1,1.
The SPI mode is determined by the state of the SCK
pin (VIH or VIL) on the when the CS pin transitions from
inactive (VIH) to active (VIL or VIHH).
All SPI interface signals are high-voltage tolerant.
FIGURE 6-1:
Typical SPI Interface Block Diagram.
SDI/SDO
SDI
SDO
SDI
R1(2)
MCP41X1
SCK
SDI
SDO
MCP4XXX
SDO
SDI
SCK
( Master Out - Slave In (MOSI) )
( Master In - Slave Out (MISO) )
Host
Controller
Host
Controller
Typical SPI Interface Connections
Typical MCP41X1 SPI Interface Connections (Host Controller Hardware SPI)
SDI/SDO
SDI
SDO
I/O
MCP41X1
I/O
SCK
Host
Controller
Alternate MCP41X1 SPI Interface Connections (Host Controller Firmware SPI)
(SDO/SDI)
(SCK)
CS
I/O (1)
CS
I/O (1)
CS
I/O (1)
Note 1: If High voltage commands are desired, some type of external circuitry needs to be
implemented.
2: R1 must be sized to ensure VIL and VIH of the devices are met.
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