參數(shù)資料
型號: LC5512MV-75Q208I
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 66/99頁
文件大小: 0K
描述: IC XPLD 512MC 7.5NS 208PQFP
標(biāo)準(zhǔn)包裝: 24
系列: ispXPLD® 5000MV
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 7.5ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
邏輯元件/邏輯塊數(shù)目: 16
宏單元數(shù): 512
輸入/輸出數(shù): 149
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
包裝: 托盤
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
65
ispXPLD 5768MX Logic Signal Connections
sysIO Bank LVDS Pair
Primary Macrocell/
Function
Alternate Outputs
Alternate
Inputs
256 fpBGA
Ball Number
484 fpBGA
Ball Number
Macrocell 1
Macrocell 2
0
127N
S22
S11
T18
S23
C4
B4
0
127P
S20
S10
T16
S21
E4
A4
0
128N
S18
Q17
S17
S19
B1
B3
0
128P
S16
Q16
S16
S17
C1
A3
0
129N
S14
Q15
S15
D3
F5
-
VCCO0
-
VCCO0
0
129P
S12
Q14
S14
S13
C2
G6
-
GND (Bank 0)
-
GND (Bank 0) GND (Bank 0)
0
130N
S10
Q13
S13
S11
E3
H6
0
130P
S8
Q12
S12
S9
D2
G5
0
131N
S6
S9
T14
S7
D3
0
131P
S4
S8
T12
S5
D2
0
132N
S2
S7
T10
S3
E4
-
VCC
-
VCC
0
132P
S0
S6
T8
S1
E3
-
GND
-
GND
0
133N
T30
S5
T6
T31
F4
0
133P
T28
S4
T4
T29
G4
0
134N
T26
S3
T2
T27
C2
-
VCCO0
-
VCCO0
0
134P
T24
S2
T0
T25
C1
-
GND (Bank 0)
-
GND (Bank 0) GND (Bank 0)
0
135N
T22
S1
-
T23
D1
F3
0
135P
T20
S0
-
T21
E1
G3
0
136N
T18
S31
-
T19
F4
H4
-
VCC
-
VCC
0
136P
T16
S30
-
T17
F5
J4
0
137N
T14
Q11
S11
T15
E2
H5
0
137P
T12/CLK_OUT0
Q10
S10
T13
F2
J5
0
138N
T10
Q9
S9
T11
F1
E2
0
138P
T8
Q8
S8
T9
G1
F2
-
GND
-
GND
0
139N
T6
Q7
S7
T7
F3
D1
-
VCCO0
-
VCCO0
0
139P
T4
Q6
S6
T5
G5
E1
-
GND (Bank 0)
-
GND (Bank 0) GND (Bank 0)
0
140N
T2
Q5
S5
T3
H5
J3
0
140P
T0/PLL_RST0
Q4
S4
T1
G4
H2
0
141N
U30
U31
W31
U31
G3
G2
0
141P
U28/PLL_FBK0
U30
W30
U29
H3
G1
0
142N
U26
U29
W29
U27
J6
0
142P
U24
U28
W28
U25
K4
SELECT
DEVICES
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