參數(shù)資料
型號(hào): LC5512MV-75Q208I
廠商: Lattice Semiconductor Corporation
文件頁(yè)數(shù): 87/99頁(yè)
文件大小: 0K
描述: IC XPLD 512MC 7.5NS 208PQFP
標(biāo)準(zhǔn)包裝: 24
系列: ispXPLD® 5000MV
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 7.5ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
邏輯元件/邏輯塊數(shù)目: 16
宏單元數(shù): 512
輸入/輸出數(shù): 149
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
包裝: 托盤
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
84
-
GCLK3P
GCLK3
-
N16
N24
3
93N
R0
T31
R31
R1
J22
N23
3
93P
R2
T30
R30
R3
H22
N22
3
94N
R4
T29
R29
R5
N19
M26
3
94P
R6
T28
R28
R7
P15
M25
3
95N
R8
T27
R27
R9
P21
M23
3
95P
R10
T26
R26
R11
N15
M22
-
GND (Bank 3)
-
GND (Bank 3) GND (Bank 3)
3
96N
R12
T25
R25
R13
M15
N20
-
VCCO3
-
VCCO3
3
96P
R14
T24
R24
R15
N20
M20
-
GND
-
GND
3
97N
R16
T23
R23
R17
P22
N21
3
97P
R18
T22
R22
R19
N21
M21
3
98N
R20
T21
R21
N17
M24
3
98P
R22
T20
R20
R23
M20
L24
3
99N
R24
T19
R19
R25
P17
L23
-
VCC
-
VCC
3
99P
R26
T18
R18
R27
P18
L22
3
100N
R28
T17
R17
R29
M21
L25
3
100P
R30
T16
R16
R31
M17
K26
-
GND (Bank 3)
-
GND (Bank 3) GND (Bank 3)
3
101N
T0
T15
R15
T1
L20
K25
-
VCCO3
-
VCCO3
3
101P
T2
T14
R14
T3
N18
K24
3
102N
T4
T13
R13
T5
L21
K23
3
102P
T6
T12
R12
T7
M18
K22
3
103N
T8
T11
R11
T9
L22
J25
3
103P
T10
R10
T11
L17
J24
3
104N
T12
T9
R9
T13
K22
L21
3
104P
T14
T8
R8
T15
L18
K21
3
105N
T16
T7
R7
T17
K21
L20
3
105P
T18
T6
R6
T19
K18
K20
-
GND (Bank 3)
-
GND (Bank 3) GND (Bank 3)
3
106N
T20
T5
R5
T21
K20
J23
-
VCCO3
-
VCCO3
3
106P
T22
T4
R4
T23
K17
J22
3
107N
T24
T3
R3
T25
K19
J26
3
107P
T26
T2
R2
T27
J17
H26
3
108N
T28
T1
R1
T29
E22
H25
3
108P
T30/PLL_FBK1
T0
R0
T31
E21
H24
3
109N
U0/PLL_RST1
X27
V27
U1
G22
H23
3
109P
U2
X26
V26
U3
F21
H22
ispXPLD 51024MX Logic Signal Connections (Continued)
sysIO
Bank
LVDS Pair
Primary
Macrocell/Function
Alternate Outputs
Alternate
Input
484 fpBGA
Ball Number
672 fpBGA
Ball Number
Macrocell 1
Macrocell 2
SELECT
DEVICES
DISCONTINUED
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