參數(shù)資料
型號(hào): LC5512MV-75Q208I
廠商: Lattice Semiconductor Corporation
文件頁(yè)數(shù): 84/99頁(yè)
文件大?。?/td> 0K
描述: IC XPLD 512MC 7.5NS 208PQFP
標(biāo)準(zhǔn)包裝: 24
系列: ispXPLD® 5000MV
可編程類(lèi)型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 7.5ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
邏輯元件/邏輯塊數(shù)目: 16
宏單元數(shù): 512
輸入/輸出數(shù): 149
工作溫度: -40°C ~ 105°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
包裝: 托盤(pán)
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
81
-
GND
-
GND
2
46P
I4
J2
L2
I5
Y12
AF19
2
46N
I6
J3
L3
I7
AA13
AF20
2
47P
I8
J4
L4
I9
V12
AF21
-
VCCO2
-
VCCO2
247N
I10
J5
L5
I11
U12
AF22
-
GND (Bank 2)
-
GND (Bank 2) GND (Bank 2)
2
48P
I12
J6
L6
I13
AB13
AF23
248N
I14
J7
L7
I15
Y13
AF24
2
49P
I16
L0
-
I17
V13
AE17
2
49N
I18/VREF2
L1
-
I19
W13
AE18
2
50P
I20
J8
L8
I21
V14
AE19
2
50N
I22
J9
L9
I23
W14
AE20
2
51P
I24
J10
L10
I25
Y14
AE21
2
51N
I26
J11
L11
I27
AB14
AE22
2
52P
I28
J12
L12
I29
AB15
AE23
2
52N
I30
J13
L13
I31
AA15
AE24
2
53P
J0
J14
L14
J1
U13
AD17
-
VCCO2
-
VCCO2
2
53N
J2
J15
L15
J3
U14
AD18
-
GND (Bank 2)
-
GND (Bank 2) GND (Bank 2)
2
54P
J4
L2
I0
J5
W15
AD19
2
54N
J6
L3
I2
J7
W16
AD20
2
55P
J8
L4
I4
J9
Y16
AD21
2
55N
J10
L5
I6
J11
AA16
AD22
2
56P
J12
L6
I8
J13
AB16
AD23
2
56N
J14
L7
I10
J15
AA17
AD24
2
57P
J16
L8
I12
J17
Y17
AC22
2
57N
J18
L9
I16
J19
AA18
AC21
2
58P
J20
L10
I20
J21
W17
AC18
-
VCC
-
VCC
2
58N
J22
L11
I22
J23
W18
AC19
-
GND
-
GND
2
59P
J24
L12
-
J25
V15
AC20
-
VCCO2
-
VCCO2
2
59N
J26
L13
-
J27
U15
AB21
-
GND (Bank 2)
-
GND (Bank 2) GND (Bank 2)
2
60P
J28
L14
-
J29
Y18
AB18
2
60N
J30
L15
-
J31
V17
AB19
2
61P
K0
L16
-
K1
V16
AB20
2
61N
K2
L17
-
K3
U16
AA20
2
62P
K4
L18
-
K5
AB18
AA19
2
62N
K6
L19
-
K7
AB19
Y19
ispXPLD 51024MX Logic Signal Connections (Continued)
sysIO
Bank
LVDS Pair
Primary
Macrocell/Function
Alternate Outputs
Alternate
Input
484 fpBGA
Ball Number
672 fpBGA
Ball Number
Macrocell 1
Macrocell 2
SELECT
DEVICES
DISCONTINUED
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