參數(shù)資料
型號(hào): LC5768VG-75F484I
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 27/99頁
文件大小: 0K
描述: IC XPLD 768MC 7.5NS 484FPBGA
標(biāo)準(zhǔn)包裝: 60
系列: ispMACH™ 5000VG
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 7.5ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
邏輯元件/邏輯塊數(shù)目: 24
宏單元數(shù): 768
輸入/輸出數(shù): 304
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 484-BBGA
供應(yīng)商設(shè)備封裝: 484-FPBGA(23x23)
包裝: 托盤
Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
29
ispXPLD 5000MX Family External Switching Characteristics
1, 2, 3
Over Recommended Operating Conditions
Parameter
Description
-4
-45
-5
-52
-75
Units
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
tPD
Data Propagation Delay,
5-PT Bypass
—4.0
—4.5
—5.0
—5.2
—7.5
ns
tPD_PTSA
Data propagation delay
4.8
5.7
6.0
6.5
9.5
ns
tS
MFB Register Setup Time
Before Clock, 5-PT Bypass
2.2
2.8
2.8
3.0
4.5
ns
tS_PTSA
MFB Register Setup Time
Before Clock
2.5
3.1
3.1
3.6
5.5
ns
tSIR
MFB Register Setup Time
Before Clock, Input Register
Path
1.0
1.0
1.0
0.5
1.7
ns
tH
MFB Register Hold Time
Before Clock, 5-PT Bypass
0.0
0.0
0.0
0.0
0.0
ns
tH_PTSA
MFB Register Hold Time
Before Clock
0.0
0.0
0.0
0.0
0.0
ns
tHIR
MFB Register Hold Time
Before Clock, Input Register
Path
0.5
0.5
0.5
1.0
1.3
ns
tCO
MFB Register Clock-to-Out-
put Delay
—2.8
—3.0
—3.2
—3.7
—5.0
ns
tR
External Reset Pin to Output
Delay
—4.0
—4.5
—5.0
—7.5
ns
tRW
Reset Pulse Duration
1.8
1.8
1.8
2.0
3.0
ns
tLPTOE/DIS
Input to Output Local Product
Term Output Enable/Disable
—6.0
—7.0
—7.5
—8.5
10.5
ns
tSPTOE/DIS
Input to Output Shared
Product Term Output Enable/
Disable
—6.0
—7.0
—7.5
—8.5
10.5
ns
tGOE/DIS
Global OE Input to Output
Enable/Disable
—4.5
—5.5
—6.5
—7.5
ns
tCW
Clock Width, High or Low
1.5
1.5
1.5
1.8
2.5
ns
tGW
Gate Width Low (for Low
Transparent) or High (for
High Transparent)
1.5
1.5
1.5
1.8
2.5
ns
tWIR
Input Register Clock Width,
High or Low
1.5
1.5
1.5
1.8
2.5
ns
tSKEW
Clock-to-Out Skew, Block
Level
—0.6
—1.0
ns
fMAX
4
Clock Frequency with
Internal Feedback
300
275
250
250
150
MHz
fMAX (Ext.)
Clock Frequency with
External Feedback,
1/ (tS + tCO)
200
171
166
149
105
MHz
fMAX (Tog.)
Clock Frequency Max.
Toggle
333
333
333
277
200
MHz
fMAX (CAMC)
5
Clock Frequency to CAM
(Configure Mode)
280
280
230
230
168
MHz
fMAX (CAM)
5
Clock Frequency to CAM
(Compare Mode)
150
150
150
135
90
MHz
SELECT
DEVICES
DISCONTINUED
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