參數(shù)資料
型號(hào): LH7A400N0E000
廠商: Sharp Corporation
英文描述: 32-Bit System-on-Chip
中文描述: 32位系統(tǒng)級(jí)芯片
文件頁(yè)數(shù): 10/53頁(yè)
文件大?。?/td> 446K
代理商: LH7A400N0E000
LH7A400
32-Bit System-on-Chip
10
12/8/03
Preliminary Data Sheet
R5
P7
PH6/
AC97RESET
GPIO Port H
Audio Codec (AC97) Reset
GPIO Port H
Status Read Enable for PC Card (PCMCIA or
CompactFlash) in single or dual card mode
LCD Frame Synchronization pulse
LCD Line Synchronization pulse
LCD TFT Data Enable
LCD STN AC Bias
LCD Data Clock
Input: PH6
No Change
8 mA
T5
T6
PH7/nPC-
STATRE
Input: PH7
No Change
8 mA
R6
R8
T7
R9
LCDFP
LCDLP
LCDENAB/
LCDM
LCDDCLK
LCDVD0
LCDVD1
LCDVD2
LCDVD3
LOW
LOW
LOW:
LCDENAB
LOW
LOW
LOW
12 mA
12 mA
P9
P9
LOW
12 mA
N9
P7
R7
T7
N8
N9
M8
P8
R8
T8
LOW
12 mA
LCD Video Data Bus
LOW
LOW
12 mA
T15
T16
USBDP
USB Data Positive (Differential Pair)
Input
Input
75 mA
(NOM.)
75 mA
(NOM.)
T16
R16
USBDN
USB Data Negative (Differential Pair)
Input
Input
E7
C7
nPWME0
DC-DC Converter Pulse Width
Modulator 0 Enable
DC-DC Converter Pulse Width
Modulator 1 Enable
DC-DC Converter Pulse Width
Modulator 0 Output during normal operation and
Polarity Selection input at reset
DC-DC Converter Pulse Width
Modulator 1 Output during normal operation and
Polarity Selection input at reset
Audio Codec (AC97) Clock
Audio Codec (ACI) Clock
Audio Codec (AC97) Output
Audio Codec (ACI) Output
Audio Codec (AC97) Synchronization
Audio Codec (ACI) Synchronization
Audio Codec (AC97) Input
Audio Codec (ACI) Input
MultiMediaCard Clock (20 MHz MAX.)
MultiMediaCard SPI Mode Clock
MultiMediaCard Command
MultiMediaCard SPI Mode Data Input
MultiMediaCard Data
MultiMediaCard SPI Mode Data Output
UART2 Clear to Send Signal. This pin is an out-
put for JTAG boundary scan only.
UART2 Data Carrier Detect Signal. This pin is out-
put for JTAG boundary scan only.
UART2 Data Set Ready Signal
IrDA Transmit
IrDA Receive. This pin is an output for JTAG
boundary scan only.
UART2 Transmit Data Output
Input
Input
D7
A6
nPWME1
Input
Input
C7
B6
PWM0
Input
Input
8 mA
B7
B5
PWM1
Input
Input
8 mA
C4
A2
ACBITCLK
Input
Input
D5
A1
ACOUT
LOW
LOW
8 mA
B4
B2
ACSYNC
LOW
LOW
8 mA
A4
E6
ACIN
Input
Input
A3
C3
MMCCLK/
MMSPICLK
MMCCMD/
MMSPIDIN
MMCDATA/
MMSPIDOUT
LOW:
MMCCLK
Input:
MMCCMD
Input:
MMCDATA
LOW
8 mA
B3
B1
Input
8 mA
A2
D4
Input
8 mA
E2
E1
UARTCTS2
Input
Input
E3
F3
UARTDCD2
Input
Input
E5
F2
G4
G5
UARTDSR2
UARTIRTX1
Input
LOW
Input
LOW
8 mA
F3
G6
UARTIRRX1
Input
Input
F4
F1
UARTTX2
HIGH
HIGH
8 mA
Table 1. Functional Pin List (Cont’d)
PBGA
PIN
CABGA
PIN
SIGNAL
DESCRIPTION
RESET
STATE
STANDBY
STATE
OUTPUT
DRIVE
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