參數(shù)資料
型號: LH7A400N0W000
廠商: Sharp Corporation
英文描述: 32-Bit System-on-Chip
中文描述: 32位系統(tǒng)級芯片
文件頁數(shù): 46/53頁
文件大?。?/td> 446K
代理商: LH7A400N0W000
LH7A400
32-Bit System-on-Chip
46
12/8/03
Preliminary Data Sheet
Clock and State Controller (CSC)
Waveforms
Figure 18 shows the behavior of the LH7A400 when
coming out of Reset or Power On. Figure 19 shows exter-
nal reset timing, and Table 10 gives the timing parame-
ters. Figure 20 depicts signal timing following a Reset.
Figure 21 shows the recommended components for
the SHARP LH7A400 32.768 kHz external oscillator
circuit. Figure 22 shows the same for the 14.7456 MHz
external oscillator circuit. In both figures, the NAND
gate represents the internal logic of the chip.
NOTE:
*VDDC = VDDCmin
Table 10. Reset AC Timing
PARAMETER
tOSC32
tPORH
tOSC14
tPLLL
tURESET/tPWRFL
DESCRIPTION
MIN.
MAX.
550
UNIT
ms
ms
ms
μ
s
32 kHz Oscillator Stabilization Time after Power On*
nPOR Hold Time after tOSC32
14.7456 MHz Oscillator Stabilization Time after Wake UP
Phase Locked Loop Lockup Time
nURESET/nPWRFL Pulse Width (once sampled LOW)
0
4
250
2
System Clock Cycles
Figure 18. Oscillator Start-up
Figure 19. External Reset
LH7A400-25
tOSC32
tOSC14
tPORH
VDDC
VDDCmin
XTAL32
nPOR
XTAL14
LH7A400-26
tURESET
tPWRFL
nURESET
nPWRFL
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