參數(shù)資料
型號: LM4931
廠商: National Semiconductor Corporation
英文描述: Audio Subsystem with Mono High Efficiency Loudspeaker and Stereo Headphone Amplifiers
中文描述: 與單聲道音頻子系統(tǒng)高效揚聲器和立體聲耳機放大器
文件頁數(shù): 23/47頁
文件大?。?/td> 1640K
代理商: LM4931
Digital Interface Configuration Registers
This register is used to control the format of the PCM, I2S, and GPIO interfaces.
DEFAULT CHART FOR INTERFACES (09h)
DATA BIT
DEFAULT
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
INTERFACES (09h) (SET = LOGIC 1, CLEAR = LOGIC 0)
Address
Register
Description
0
PCM_COMPANDED
If set the data is assumed to be in either A-law or
u-law 8-bit companded form, otherwise it is assumed
to be up to 16 bits of MSB first linear 2’s
complement PCM format. (Note 12)
If set the data is assumed to be A-law, otherwise it is
u-law companded. (Note 12)
When set the PCM operates in a master mode.
When set the PCM operates in long mode. (Note 12)
When set the I
2
S operates in a master mode.
This selects if each word is 16 or 32 bits long: (Note
16)
I
2
S_RES
0
1
In 32 bit mode the 18 MSBs are passed to the DAC.
In 16 bit mode all 16 bits are passed to the DAC.
RESERVED (Note 14)
RESERVED (Note 14)
1
PCM_ALAW_ULAW
2
3
4
PCM_MS
PCM_LONG
I
2
S_MS
5
I
2
S_RES
Word Length
16
32
6
7
RSVD
RSVD
Note 16:
Always operate the digital IO at the lowest frequency possible to save power and reduce noise. Obviously this can limit the resolution of the I
2
S interface
from 18 bits to 16 bits, but if only 16 bit data is available use the 16 bit mode to reduce I/O power.
L
www.national.com
23
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