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參數(shù)資料
| 型號： | LPC2290 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 16/32-bit ARM microcontrollers with CAN, 10-bit ADC and external memory interface |
| 中文描述： | 與CAN，16/32位ARM微控制器的10位模數(shù)轉(zhuǎn)換器和外部存儲器接口 |
| 文件頁數(shù)： | 25/41頁 |
| 文件大?。?/td> | 185K |
| 代理商： | LPC2290 |
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Philips Semiconductors
LPC2290
16/32-bit ARM microcontrollers with external memory interface
Preliminary data
Rev. 01 — 09 February 2004
25 of 41
9397 750 12874
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
6.20.3
Reset and wake-up timer
Reset has two sources on the LPC2290: the RESET pin and Watchdog Reset. The
RESET pin is a Schmitt trigger input pin with an additional glitch filter. Assertion of
chip Reset by any source starts the Wake-up Timer (see Wake-up Timer description
below), causing the internal chip reset to remain asserted until the external Reset is
de-asserted, the oscillator is running, a fixed number of clocks have passed, and the
on-chip circuitry has completed its initialization.
When the internal Reset is removed, the processor begins executing at address 0,
which is the Reset vector. At that point, all of the processor and peripheral registers
have been initialized to predetermined values.
The wake-up timer ensures that the oscillator and other analog functions required for
chip operation are fully functional before the processor is allowed to execute
instructions. This is important at power on, all types of Reset, and whenever any of
the aforementioned functions are turned off for any reason. Since the oscillator and
other functions are turned off during Power-down mode, any wake-up of the
processor from Power-down mode makes use of the Wake-up Timer.
The Wake-up Timer monitors the crystal oscillator as the means of checking whether
it is safe to begin code execution. When power is applied to the chip, or some event
caused the chip to exit Power-down mode, some time is required for the oscillator to
produce a signal of sufficient amplitude to drive the clock logic. The amount of time
depends on many factors, including the rate of V
DD
ramp (in the case of power on),
the type of crystal and its electrical characteristics (if a quartz crystal is used), as well
as any other external circuitry (e.g. capacitors), and the characteristics of the
oscillator itself under the existing ambient conditions.
6.20.4
External interrupt inputs
The LPC2290 includes up to nine edge or level sensitive External Interrupt Inputs as
selectable pin functions. When the pins are combined, external events can be
processed as four independent interrupt signals. The External Interrupt Inputs can
optionally be used to wake up the processor from Power-down mode.
6.20.5
Memory Mapping Control
The Memory Mapping Control alters the mapping of the interrupt vectors that appear
beginning at address 0x00000000. Vectors may be mapped to the bottom of the
BANK0 external memory, or to the on-chip static RAM. This allows code running in
different memory spaces to have control of the interrupts.
6.20.6
Power Control
The LPC2290 supports two reduced power modes: Idle mode and Power-down
mode. In Idle mode, execution of instructions is suspended until either a Reset or
interrupt occurs. Peripheral functions continue operation during Idle mode and may
generate interrupts to cause the processor to resume execution. Idle mode eliminates
power used by the processor itself, memory systems and related controllers, and
internal buses.
In Power-down mode, the oscillator is shut down and the chip receives no internal
clocks. The processor state and registers, peripheral registers, and internal SRAM
values are preserved throughout Power-down mode and the logic levels of chip
output pins remain static. The Power-down mode can be terminated and normal
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