參數(shù)資料
型號(hào)： LPC2290
廠商： NXP Semiconductors N.V.
英文描述： 16/32-bit ARM microcontrollers with CAN, 10-bit ADC and external memory interface
中文描述： 與CAN，16/32位ARM微控制器的10位模數(shù)轉(zhuǎn)換器和外部存儲(chǔ)器接口
文件頁(yè)數(shù)： 33/41頁(yè)
文件大?。?/td> 185K
代理商： LPC2290
Philips Semiconductors
LPC2290
16/32-bit ARM microcontrollers with external memory interface
Preliminary data
Rev. 01 — 09 February 2004
33 of 41
9397 750 12874
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9.
Dynamic characteristics
[1]
[2]
Parameters are valid over operating temperature range unless otherwise specified.
Bus capacitance C
b
in pF, from 10 pF to 400 pF.
Table 12:
T
amb
= 0
°
C to
+
70
°
C for commercial,
40
°
C to +85
°
C for industrial, V
18
, V
3
over specified ranges
[1]
Symbol
Parameter
External Clock
f
osc
Oscillator frequency supplied by an
external oscillator (signal generator)
External clock frequency supplied by
an external crystal oscillator
External clock frequency if on-chip
PLL is used
External clock frequency if on-chip
boot-loader is used for initial code
download
t
C
External oscillator clock period
t
CHCX
Clock high time
t
CLCX
Clock low time
t
CLCH
Clock rise time
t
CHCL
Clock fall time
Port Pins
t
RISE
Port output rise time (except P0.2,
P0.3)
t
FALL
Port output fall time (except P0.2,
P0.3)
I
2
C pins
t
f
Output fall time from V
IH
to V
IL
Characteristics
Conditions
Min
Typ
[1]
Max
Unit
1
-
50
MHz
1
-
30
MHz
10
-
25
MHz
10
-
25
MHz
20
t
c
×
0.4
t
c
×
0.4
-
-
-
-
-
-
-
1000
-
-
5
5
ns
ns
ns
ns
ns
-
10
-
ns
-
10
-
ns
20 +
0.1
×
C
b
[2]
-
-
ns
Table 13:
Symbol
Common to Read and Write Cycles
t
CHAVR
XCLK HIGH to Address Valid
t
CHCSL
XCLK HIGH to CS LOW
t
CHCSH
XCLK HIGH to CS HIGH
t
CHANV
XCLK HIGH to Address Invalid
Read Cycle Parameters
t
CSLAV
CS LOW to Address Valid
t
OELAVR
OE LOW to Address Valid
t
CSLOEL
CS LOW to OE LOW
t
AVDV
Memory Access Time (latest of Address
Valid, CS LOW, OE LOW to Data Valid)
External memory interface AC characteristics. C
L
= 25 pF. T
amb
= 40
°
C
Description
Min
Max
Unit
-
-
-
-
10
10
10
10
ns
ns
ns
ns
5
[1]
5
[1]
5
(t
CYC
*(2 + WST1)) + (
20) -
10
10
5
ns
ns
ns
ns
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