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Stacked Chip (16M Flash & 2M SRAM)
LRS1341/LRS1342
Data Sheet
5
SR.7 = Write State Machine Status (WSMS)
1 = Ready
0 = Busy
SR.6 = Erase Suspend Status (ESS)
1 = Block Erase Suspended
0 = Block Erase in Progress/Completed
SR.5 = Erase Status (ES)
1 = Error in Block Erasure
0 = Successful Block Erase
SR.4 = Word Write Status (WWS)
1 = Error in Word Write
0 = Successful Word Write
SR.3 = V
PP
Status (VPPS)
1 = F-V
PP
LOW Detect, Operation Abort
0 = F-V
PP
Okay
SR.2 = Word Write Suspend Status (WWSS)
1 = Word Write Suspended
0 = Word Write in Progress/Completed
SR.1 = Device Protect Status (DPS)
1 = F-WP and/or F-RP Lock Detected,
Operation Abort
0 = Unlock
SR.0 = Reserved for future enhancements (R)
NOTES:
1. Check RY/BY or SR.7 to determine block erase or word write
completion. SR.6 - SR.0 are invalid while SR.7 = 0.
2. If both SR.5 and SR.4 are
‘
1
’
s after a block erase attempt, an
improper command sequence was entered.
3. SR.3 does not provide a continuous indication of F-V
PP
level. The
WSM interrogates and indicates the F-V
PP
level only after Block
Erase or Word Write command sequences. SR.3 is not guaranteed
to report accurate feedback only when F-V
PP
≠
V
PPH1
, V
PPH2
.
4. The WSM interrogates the F-WP and F-RP only after Block Erase
or Word Write command sequences. It informs the system,
depending on the attempted operation, if the F-WP is not V
IH
or
F-RP is not V
HH
.
5. SR.0 is reserved for future use and should be masked out when
polling the status register.
Table 4. Identifier Codes
CODES
ADDRESS
(A
0
- A
18
)
00000H
00001H
LRS1341 DATA
(DQ
0
- DQ
7
)
B0H
48H
LRS1342 DATA
(DQ
0
- DQ
7
)
B0H
49H
Manufacture Code
Device Code
Table 5. Write Protection Alternatives
OPERATION
F-V
PP
V
IL
F-RP
F-WP
EFFECT
Block Erase or
Word Write
X
X
X
X
All blocks locked
> V
PPLK
V
IL
V
HH
V
IH
V
IH
All blocks locked
All blocks unlocked
V
IL
V
IH
Two boot blocks locked
All blocks unlocked
Table 6. Status Register Definition
WSMS
ESS
ES
WWS
VPPS
WWSS
DPS
R
7
6
5
4
3
2
1
0