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參數(shù)資料
| 型號： | LT8500IUHH#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 7/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PWM GENERATOR 56-QFN |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 類型： | PWM 發(fā)生器 |
| PLL： | 無 |
| 主要目的： | LED 照明 |
| 輸入： | CMOS，TTL |
| 輸出： | CMOS，TTL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 0.075 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 50MHz |
| 電源電壓： | 3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 56-QFN-EP（5x9） |
| 包裝： | 管件 |
LT8500
15
8500f
Asynchronous Update Frame: CMD = 0x1X
An asynchronous update frame updates PWM[48:1] with
the data in the frame, after processing through the correc-
tionmultiplier.ThePWMRisupdatedwhenLDIBLANKgoes
high.ThePWMRSYNCregisterwillbewrittenimmediately
(asynchronously), through the PWMR, when LDI is high.
ThevalueinthePWMRSYNCregisterswillupdatethePWM
outputs on the next rising edge of PWMCK. Examples are
shown in Figure 6, cases C and F.
Correction Frame: CMD = 0x2X
A correction frame updates the correction registers (COR)
with the six MSB’s of each channel’s data field in the
frame. The CORs are used by the correction multiplier to
adjust the PWM width, prescaled by 2/3, by a multiplier of
between 0.5 and ~1.5. Example PWM width calculations
are shown in Table 1. In typical applications, this com-
mand will only be run once after power-up to initialize the
system. Therefore, a correction frame will not update the
PWM outputs. The update frame that follows a correction
frame will reflect the COR update.
Output Enable Frame: CMD = 0x3X
An output enable frame starts a PWM period, and enables
the PWM outputs, on the second PWMCK edge after
LDIBLANK goes high. There is no effect on either SDO or
SCKO. The data in the output enable frame is irrelevant
to the command, but allows a daisy chain of LT8500’s to
function properly.
Output Disable Frame: CMD = 0x4X
An output disable frame immediately resets the PWMCK
counterwhenLDIgoeshigh,anddisablesthePWMoutputs
on the next rising edge of PWMCK. There is no effect on
either SDO or SCKO. The data in the output disable frame
is irrelevant to the command, but allows a daisy chain of
LT8500’s to function properly.
Self Test Frame: CMD = 0x5X
The self test frame can be used for diagnostics on each
PWM[48:1], including identifying open LED strings on
an LT3595A. After LDIBLANK goes hi, the LT8500 pulses
PWM[1] through PWM[48] sequentially for 64 PWMCK
cycles each. The state of the OPENLED pin is captured
for each channel while the corresponding PWM pin is
high. This by-channel data is subsequently shifted out in
the status frame. In addition, the status frame will set the
open LED test bit (OLT) to confirm that the OPENLED data
in the current status frame is from the self test. For all
othercommands,thestateoftheOPENLEDpiniscaptured
once on the first SCKI of the frame. The same value is
then reported in the status frame on all 48 channels. The
data in the self test frame is irrelevant to the command,
but allows a daisy chain of LT8500’s to function properly.
operaTion
Table 2. Command Register Decoding
CMD (CR[7:0])
NAME
SUMMARY
FRAME DATA
0000_xxxx
Synchronous Update Frame
Update PWM’s Synchronously to PWM Period
PWM Update by Channel
0001_xxxx
Asynchronous Update Frame
Update PWM’s Asynchronously to PWM Period
PWM Update by Channel
0010_xxxx
Correction Frame
Set PWM Correction Factor
Correction by Channel
0011_xxxx
Output Enable Frame
Enable PWM Outputs
Don’t Care
0100_xxxx
Output Disable Frame
Disable (Drive Low) PWM Outputs
Don’t Care
0101_xxxx
Self Test Frame
Initiates Self Test
Don’t Care
0110_xxxx
Phase-Shift Toggle Frame
Toggle 16-Channel Bank 120° Phase-Shift (PHS)
Don’t Care
0111_xxxx
Correction Toggle Frame
Toggle Correction Disable Bit in Multiplier (CRD)
Don’t Care
1xxx_xxxx
Reserved
Do Not Use
–
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