參數(shù)資料
型號： LU6612
廠商： Lineage Power
英文描述： Single-FET for 10Base-T/100Base-TX(應(yīng)用于10基數(shù)-T和100基數(shù)-TX 的單快速以太網(wǎng)收發(fā)器)
中文描述： 單為10BASE-T/100BASE-TX快速以太網(wǎng)場效應(yīng)晶體管（應(yīng)用于10基數(shù)- T的和100基數(shù)，得克薩斯州的單快速以太網(wǎng)收發(fā)器）
文件頁數(shù)： 3/36頁
文件大?。?/td> 528K
代理商： LU6612
Table of Contents
(continued)
Tables
(continued)
Page
Data Sheet
July 2000
LU6612
FASTCAT Single-FET for 10Base-T/100Base-TX
Lucent Technologies Inc.
3
Table 28. Serial 10 Mbits/s Timing for TX_EN, TX/TY, CRS, and RX_CLK........................................................... 28
Table 29. Serial 10 Mbits/s Timing for TX_EN, RX/RY, and COL........................................................................... 29
Table 30. Serial 10 Mbits/s Timing for RX_CLK, CRS, RXD, TX_CLK, TX_EN, and TXD (25 pF Load)............... 30
Table 31. Serial 10 Mbits/s Timing for RX_CLK and TX_CLK (25 pF Load).......................................................... 31
Table 32. 100 Mbits/s MII Transmit Timing............................................................................................................. 32
Table 33. 100 Mbits/s MII Receive Timing............................................................................................................. 33
List of Figures
Figures
Page
Figure 1. Functional Block Diagram: Device Overview ............................................................................................ 4
Figure 2. Functional Block Diagram: Device Detail .................................................................................................. 5
Figure 3. Typical Twisted-Pair (TP) Interface........................................................................................................... 6
Figure 4. Onboard Universal Twisted-Pair Interface Circuit to Interchange Lucent and Quality
Semiconductor Inc. Parts.......................................................................................................................... 7
Figure 5. LU6612 Pinout........................................................................................................................................... 8
Figure 6. MDIO Input Timing .................................................................................................................................. 25
Figure 7. MDIO Output Timing ............................................................................................................................... 25
Figure 8. MDIO During TA (Turnaround) of a Read Transaction ........................................................................... 25
Figure 9. MII Timing Requirements for LU6612 ..................................................................................................... 27
Figure 10. Serial 10 Mbits/s Timing for RX/RY, CRS, and RX_CLK ...................................................................... 28
Figure 11. Serial 10 Mbits/s Timing for TX_EN, TX/TY, CRS, and RX_CLK.......................................................... 28
Figure 12. Serial 10 Mbits/s Timing for TX_EN, RX/RY, and COL......................................................................... 29
Figure 13. Serial 10 Mbits/s Timing for RX_CLK, CRS, RXD, TX_CLK, TX_EN, and TXD ................................... 30
Figure 14. Serial 10 Mbits/s Timing Diagram for RX_CLK and TX_CLK................................................................ 31
Figure 15. 100 Mbits/s MII Transmit Timing ........................................................................................................... 32
Figure 16. 100 Mbits/s MII Receive Timing ............................................................................................................ 33
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