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參數(shù)資料
| 型號： | LXT351QE |
| 廠商： | INTEL CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|QFP|44PIN|PLASTIC |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數(shù)： | 38/46頁 |
| 文件大小： | 1132K |
| 代理商： | LXT351QE |
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LXT351
—
T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation
38
Datasheet
Table 28. Receive Timing Characteristics for T1 Operation
(See
Figure 15
)
Parameter
Sym
Min
Typ
1
Max
Unit
Receive clock duty cycle
2, 3
RLCKd
40
50
60
%
Receive clock pulse width
2, 3
t
PW
–
648
–
ns
Receive clock pulse width High
t
PWH
–
324
–
ns
Receive clock pulse width Low
1,3
t
PWL
260
324
388
ns
RPOS/RNEG to RCLK rise time
t
SUR
–
274
–
ns
RCLK rise to RPOS/RNEG hold time
t
HR
–
274
–
ns
1. Typical s are at 25
°
C and are for design aid only; not guaranteed and not subject to production testing.
2. RCLK duty cycle widths will vary according to extent of received pulse jitter displacement. Max and Min RCLK duty cycles
are for worst case jitter conditions.
3. Worst case conditions guaranteed by design only.
Table 29. Receive Timing Characteristics for E1 Operation
(See
Figure 15
)
Parameter
Sym
Min
Typ
1
Max
Unit
Receive clock duty cycle
2, 3
RLCKd
40
50
60
%
Receive clock pulse width
2, 3
t
PW
–
488
–
ns
Receive clock pulse width High
t
PWH
–
244
–
ns
Receive clock pulse width Low
1,3
t
PWL
195
244
293
ns
RPOS/RNEG to RCLK rise time
t
SUR
–
194
–
ns
RCLK rise to RPOS/RNEG hold time
t
HR
–
194
–
ns
1. Typical figures are at 25
°
C and are for design aid only; not guaranteed and not subject to production testing.
2. RCLK duty cycle widths will vary according to extent of received pulse jitter displacement. Max and Min. RCLK duty cycles
are for worst case jitter conditions (0.4 UI clock displacement for 1.544 MHz).
3. Worst case conditions guaranteed by design only.
Figure 15. Receive Clock Timing
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| LXT361QE | Integrated T1/E1 LH/SH Transceivers for DS1/DSX-1/CSU or NTU/ISDN PRI Applications |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LXT360 | 制造商:LVL1 制造商全稱:LVL1 功能描述:Integrated T1/E1 LH/SH Transceivers for DS1/DSX-1/CSU or NTU/ISDN PRI Applications |
| LXT360LE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|QFP|44PIN|PLASTIC |
| LXT360PE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|LDCC|28PIN|PLASTIC |
| LXT360QE | 制造商:Intel 功能描述: 制造商:LEVEL ONE 功能描述: |
| LXT361 | 制造商:LVL1 制造商全稱:LVL1 功能描述:Integrated T1/E1 LH/SH Transceivers for DS1/DSX-1/CSU or NTU/ISDN PRI Applications |
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