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參數(shù)資料
| 型號： | LXT6234 |
| 廠商： | Intel Corp. |
| 英文描述： | E-Rate Multiplexer |
| 中文描述： | 電子速率復用器 |
| 文件頁數(shù)： | 13/24頁 |
| 文件大?。?/td> | 327K |
| 代理商： | LXT6234 |
E-Rate Multiplexer
—
LXT6234
Datasheet
13
In case of tributary transmission failure or the loss of a signal, tributary data can be forced to an all
1’s state. For each tributary this function is controlled at the MLFAIS
x
pin.
3.4.1
Flag Bits
Two flag bits, defined as the National Bit (MNAT) and AIS/Error Bit (MAIS) are transmitted with
each frame. At the appropriate time the bit values of the MNAT and MAIS inputs are inserted into
the frame. There are also four auxiliary flag channels available (AUXI
x
) that use the justification
bit. These flags are placed in the frame approximately 40% of the time, depending on the ratio of
the tributary clock to the multiplexer clock. A high on MESA
x
indicates that the AUXI
x
flag will
be inserted into the current frame.
Figure 4. E2 Frame
Figure 5. E3 Frame
J1
213
J2
J3
J4
208 E1
217
J1
425
J2
J3
J4
208 E1
429
J1
637
J2
J3
J4
S1
S2
S3
204 E1
645
641
S4
4xE1
F1...F10
J1...J4
S1...S4
AIS
NAT
Tributaries Data
Frame Bits
Justification Ind.
Justification Bits
Auxiliary Bits
Alarm Bit
National Bit
205
1
4
1
1
1
x
x
x
x
x
x
4
10
3
4
1
1
820
10
12
4
1
1
Total
848
F1
385
F2
F3
F4
F5
F6
F7
F9
F8
F10
AIS
NAT
372 E2
J1
J2
J3
J4
380 E2
389
J1
769
J2
J3
J4
380 E2
773
J1
1153
J2
J3
J4
S1
S2
S3
376 E2
1161
1157
S4
4xE2
F1...F10
J1...J4
S1...S4
AIS
NAT
Tributaries Data
Frame Bits
Justification Ind.
Justification Bits
Auxiliary Bits
Alarm Bit
National Bit
377
1
4
1
1
1
x
x
x
x
x
x
4
10
3
4
1
1
1508
10
12
4
1
1
Total
1536
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