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參數(shù)資料
| 型號： | M13S128324A |
| 廠商： | Elite Semiconductor Memory Technology Inc. |
| 英文描述： | 1M x 32 Bit x 4 Banks Double Data Rate SDRAM |
| 中文描述： | 100萬× 32位× 4個(gè)銀行雙倍數(shù)據(jù)速率SDRAM |
| 文件頁數(shù)： | 2/49頁 |
| 文件大?。?/td> | 888K |
| 代理商： | M13S128324A |
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ES MT
M13S128324A
Elite Semiconductor Memory Technology Inc.
Publication Date : May. 2007
Revision : 1.8 2/49
DDR SDRAM
1M x 32 Bit x 4 Banks
Double Data Rate SDRAM
Features
z
JEDEC Standard
z
Internal pipelined double-data-rate architecture, two data access per clock cycle
z
Bi-directional data strobe (DQS)
z
On-chip DLL
z
Differential clock inputs (CLK and CLK )
z
DLL aligns DQ and DQS transition with CLK transition
z
Quad bank operation
z
CAS Latency : 2; 2.5; 3;4
z
Burst Type : Sequential and Interleave
z
Burst Length : 2, 4, 8, full page
z
Full page burst length for sequential burst type only
z
Start address of the full page burst should be even
z
All inputs except data & DM are sampled at the rising edge of the system clock(CLK)
z
Data I/O transitions on both edges of data strobe (DQS)
z
DQS is edge-aligned with data for reads; center-aligned with data for WRITE
z
Data mask (DM) for write masking only
z
V
DD
= 2.375V ~ 2.625V, V
DDQ
= 2.375V ~ 2.625V
z
V
DD
= 2.5V ~ 2.7V, V
DDQ
= 2.5V ~ 2.7V [for speed -3.6]
z
Auto & Self refresh
z
32ms refresh period (4K cycle)
z
SSTL-2 I/O interface
z
144Ball FBGA and 100 pin LQFP package
Operating Frequencies :
PRODUCT NO.
MAX FREQ
VDD
PACKAGE
COMMENTS
M13S128324A -3.6BG
275MHz
2.6V
144 Ball FBGA
Pb-free
M13S128324A -4BG
250MHz
2.5V
144 Ball FBGA
Pb-free
M13S128324A -5BG
200MHz
2.5V
144 Ball FBGA
Pb-free
M13S128324A -6BG
166MHz
2.5V
144 Ball FBGA
Pb-free
M13S128324A -4LG
250MHz
2.5V
100 pin LQFP
Pb-free
M13S128324A -5LG
200MHz
2.5V
100 pin LQFP
Pb-free
M13S128324A -6LG
166MHz
2.5V
100 pin LQFP
Pb-free
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M13S2561616A | 4M x 16 Bit x 4 Banks Double Data Rate SDRAM |
| M13S2561616A-4TG | 4M x 16 Bit x 4 Banks Double Data Rate SDRAM |
| M13S2561616A-5TG | 4M x 16 Bit x 4 Banks Double Data Rate SDRAM |
| M13S2561616A-6TG | 4M x 16 Bit x 4 Banks Double Data Rate SDRAM |
| M13S256328A | 2M x 32 Bit x 4 Banks Double Data Rate SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M13S128324A_09 | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S128324A_1 | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S128324A-3.6BG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S128324A-4BG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S128324A-4LG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM |
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